[flashrom] AMD - SP5100 - take SPI ownership (1/2)

Rudolf Marek r.marek at assembler.cz
Sat Mar 30 10:54:13 CET 2013


Hi,

Found chipset "AMD SB7x0/SB8x0/SB9x0" with PCI ID 1002:439d. Enabling flash 
write...
EC SIO is at 0x16e
EC MBOX is at 0x3e
(Shutting down IMC)
SPI base address is at 0xfec10000

This means that firmware correctly responded to the command and most likely 
moved itself to internal RAM.

Verifying flash... VERIFIED.

EC SIO is at 0x16e
EC MBOX is at 0x3e
(IMC resume failed!)

This means that firmware was not able to continue at the end?

I have a couple of questions:

1) did you perform full power cycle (even unplugging the PSU)?

I suspect that the IMC may run even if main cpu is off. I also suspect it fully 
initializes only if performing this "cold boot".

2) what was the update? It was from original BIOS to coreboot? Does coreboot 
have a embedded IMC image? Does the IMC image start at the same location?

What we could  additionally check is if the IMC firmware location does not match 
in source and dest image, bail out. Or if the base addr has been changed.

Thanks
Rudolf





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