[flashrom] flashrom ignores layout file?
Ross Amans
ross.amans at sanmina.com
Tue Mar 5 00:49:36 CET 2013
I can run flashrom under linux for read, but not yet write.
Sandy Bridge / Patsburg C602
When I attempt to use a layout file, it likes it, but ignores it. No
complaints, but instead of doing the 4 MB bios, it does the whole flash
(8MB).
command line:
./flashrom -r fll-19-w-bios.bin -c W25Q64 -p
internal:laptop=this_is_not_a_laptop -i bios -l layout.flash -o fl-bios.log
layout.flash:
00000000:0000ffff desc
00010000:003fffff me
00400000:007fffff bios
fl-bios.log:
flashrom v0.9.6.1-r1653 on Linux 3.7.5-201.fc18.x86_64 (x86_64)
flashrom was built with libpci 3.1.10, GCC 4.7.2 20121109 (Red Hat
4.7.2-8), little endian
Command line (12 args): ./flashroml -r fll-19-w-bios.bin -c W25Q64 -p
internal:laptop=this_is_not_a_laptop -i bios -l layout.flash -o fl-bios.log
romlayout 00000000 - 0000ffff named desc
romlayout 00010000 - 003fffff named me
romlayout 00400000 - 007fffff named bios
Using region: "bios".
Calibrating delay loop... OS timer resolution is 1 usecs, 1781M loops per
second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 1004 us, 10000 myus
= 9992 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "To be filled by O.E.M."
DMI string system-product-name: "To be filled by O.E.M."
DMI string system-version: "To be filled by O.E.M."
DMI string baseboard-manufacturer: "To be filled by O.E.M."
DMI string baseboard-product-name: "To be filled by O.E.M."
DMI string baseboard-version: "To be filled by O.E.M."
DMI string chassis-type: "Desktop"
Found chipset "Intel X79" with PCI ID 8086:1d41. Enabling flash write...
0xfff80000/0xffb80000 FWH IDSEL: 0x0
0xfff00000/0xffb00000 FWH IDSEL: 0x0
0xffe80000/0xffa80000 FWH IDSEL: 0x1
0xffe00000/0xffa00000 FWH IDSEL: 0x1
0xffd80000/0xff980000 FWH IDSEL: 0x2
0xffd00000/0xff900000 FWH IDSEL: 0x2
0xffc80000/0xff880000 FWH IDSEL: 0x3
0xffc00000/0xff800000 FWH IDSEL: 0x3
0xff700000/0xff300000 FWH IDSEL: 0x4
0xff600000/0xff200000 FWH IDSEL: 0x5
0xff500000/0xff100000 FWH IDSEL: 0x6
0xff400000/0xff000000 FWH IDSEL: 0x7
0xfff80000/0xffb80000 FWH decode enabled
0xfff00000/0xffb00000 FWH decode enabled
0xffe80000/0xffa80000 FWH decode enabled
0xffe00000/0xffa00000 FWH decode enabled
0xffd80000/0xff980000 FWH decode enabled
0xffd00000/0xff900000 FWH decode enabled
0xffc80000/0xff880000 FWH decode enabled
0xffc00000/0xff800000 FWH decode enabled
0xff700000/0xff300000 FWH decode disabled
0xff600000/0xff200000 FWH decode disabled
0xff500000/0xff100000 FWH decode disabled
0xff400000/0xff000000 FWH decode disabled
Maximum FWH chip size: 0x100000 bytes
BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled
Root Complex Register Block address = 0xfed1c000
GCS = 0xc20: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3800
0x04: 0x6008 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0
Programming OPCODES...
program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
done
OP Type Pre-OP
op[0]: 0x02, write w/ addr, none
op[1]: 0x03, read w/ addr, none
op[2]: 0xd8, write w/ addr, none
op[3]: 0x05, read w/o addr, none
op[4]: 0x90, read w/ addr, none
op[5]: 0x01, write w/o addr, none
op[6]: 0x9f, read w/o addr, none
op[7]: 0xc7, write w/o addr, none
Pre-OP 0: 0x06, Pre-OP 1: 0x50
0x06: 0x0000 (HSFC)
HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
0x08: 0x007fffc0 (FADDR)
0x50: 0x0000ffff (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff
0x54: 0x000f0000 FREG0: Flash Descriptor region (0x00000000-0x0000ffff) is
read-write.
0x58: 0x07ff0400 FREG1: BIOS region (0x00400000-0x007fffff) is read-write.
0x5C: 0x03ff0010 FREG2: Management Engine region (0x00010000-0x003fffff) is
read-write.
0x60: 0x00001fff FREG3: Gigabit Ethernet region is unused.
0x64: 0x00001fff FREG4: Platform Data region is unused.
0x74: 0x00000000 (PR0 is unused)
0x78: 0x00000000 (PR1 is unused)
0x7C: 0x00000000 (PR2 is unused)
0x80: 0x00000000 (PR3 is unused)
0x84: 0x00000000 (PR4 is unused)
0x90: 0x84 (SSFS)
SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0
0x91: 0xf87f10 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0
0x94: 0x5006 (PREOP)
0x96: 0x463b (OPTYPE)
0x98: 0x05d80302 (OPMENU)
0x9C: 0xc79f0190 (OPMENU+4)
0xA0: 0x00000000 (BBAR)
0xC4: 0x00002005 (LVSCC)
LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0
0xC8: 0x00002005 (UVSCC)
UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0
0xD0: 0x00000000 (FPB)
Reading flash descriptors mapped by the chipset via FDOC/FDOD... done.
=== Content Section ===
FLVALSIG 0x0ff0a55a
FLMAP0 0x02040003
FLMAP1 0x12100206
FLMAP2 0x00210020
--- Details ---
NR (Number of Regions): 3
FRBA (Flash Region Base Address): 0x040
NC (Number of Components): 1
FCBA (Flash Component Base Address): 0x030
ISL (ICH/PCH Strap Length): 18
FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100
NM (Number of Masters): 3
FMBA (Flash Master Base Address): 0x060
MSL/PSL (MCH/PROC Strap Length): 0
FMSBA (Flash MCH/PROC Strap Base Address): 0x200
=== Component Section ===
FLCOMP 0x00100024
FLILL 0x00000000
--- Details ---
Component 1 density: 8 MB
Component 2 is not used.
Read Clock Frequency: 20 MHz
Read ID and Status Clock Freq.: 20 MHz
Write and Erase Clock Freq.: 20 MHz
Fast Read is supported.
Fast Read Clock Frequency: 20 MHz
No forbidden opcodes.
=== Region Section ===
FLREG0 0x000f0000
FLREG1 0x07ff0400
FLREG2 0x03ff0010
FLREG3 0x00001fff
--- Details ---
Region 0 (Descr.) 0x00000000 - 0x0000ffff
Region 1 (BIOS ) 0x00400000 - 0x007fffff
Region 2 (ME ) 0x00010000 - 0x003fffff
Region 3 (GbE ) is unused.
=== Master Section ===
FLMSTR1 0xffff0000
FLMSTR2 0xffff0000
FLMSTR3 0xffff0118
--- Details ---
Descr. BIOS ME GbE Platf.
BIOS rw rw rw rw rw
ME rw rw rw rw rw
GbE rw rw rw rw rw
SPI Read Configuration: prefetching enabled, caching enabled, OK.
The following protocols are supported: FWH, SPI.
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4017
Found Winbond flash chip "W25Q64" (8192 kB, SPI) at physical address
0xff800000.
Chip status register is 0x00.
This chip may contain one-time programmable memory. flashrom cannot read
and may never be able to write it, hence it may not be able to completely
clone the contents of this chip (see man page for details).
Block protection is disabled.
Reading flash... done.
Restoring MMIO space at 0x7f6ced1e68a0
Restoring MMIO space at 0x7f6ced1e689c
Restoring MMIO space at 0x7f6ced1e6898
Restoring MMIO space at 0x7f6ced1e6896
Restoring MMIO space at 0x7f6ced1e6894
Restoring PCI config space for 00:1f:0 reg 0xdc
--
Ross Amans
Systems Engineer
Newisys div of Sanmina
5385 Mark Dabling blvd
Colorado Springs, CO 80918
719-884-8714 (work)
719-287-4446 (cell)
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