[flashrom] MSI H87-G43 flash success :)

Marek Zakrzewski zakrzewskim at wp.pl
Tue Jul 30 12:26:33 CEST 2013



-----Original Message-----
From: Stefan Tauner [mailto:stefan.tauner at student.tuwien.ac.at] 
Sent: Tuesday, July 30, 2013 11:24 AM
To: Marek Zakrzewski
Cc: flashrom at flashrom.org
Subject: Re: [flashrom] MSI H87-G43 flash success :)

>Hello Marek and thanks for your report!
>Can you please update to at least flashrom r1656 and send a -VV probe
>log? I want to check a few things that have changed since then. The
>packages from rawhide would be new enough (no idea if they are easily
>installable for you), building from source is also rather easy, see:
>http://flashrom.org/Download#Installation_from_source

The only trouble I've found is that flashrom resets all settings to default.

Here you are:

flashrom v0.9.6.1-r1705 on Linux 3.0.88-1.el5.elrepo (x86_64)
flashrom was built with libpci 3.1.7, GCC 4.1.2 20080704 (Red Hat 4.1.2-54),
little endian
Command line (4 args): flashrom --programmer=internal -VV -o log.log
Calibrating delay loop... OS timer resolution is 1 usecs, 2192M loops per
second, delay more than 10% too short (got 64% of expected delay),
recalculating... 2192M loops per second, delay more than 10% too short (got
64% of expected delay), recalculating... 2233M loops per second, delay more
than 10% too short (got 66% of expected delay), recalculating... 2199M loops
per second, delay more than 10% too short (got 65% of expected delay),
recalculating... 2205M loops per second, delay loop is unreliable, trying to
continue 10 myus = 6 us, 100 myus = 65 us, 1000 myus = 650 us, 10000 myus =
8658 us, 4 myus = 3 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "MSI"
DMI string system-product-name: "MS-7816"
DMI string system-version: "1.0"
DMI string baseboard-manufacturer: "MSI"
DMI string baseboard-product-name: "H87-G43 (MS-7816)"
DMI string baseboard-version: "1.0"
DMI string chassis-type: "Desktop"
Found chipset "Intel H87" with PCI ID 8086:8c4a. 
This chipset is marked as untested. If you are using an up-to-date version
of flashrom *and* were (not) able to successfully update your firmware with
it,
then please email a report to flashrom at flashrom.org including a verbose (-V)
log.
Thank you!
Enabling flash write... 
0x7fffffff/0x7fffffff FWH IDSEL: 0x0
0x7fffffff/0x7fffffff FWH IDSEL: 0x0
0x7fffffff/0x7fffffff FWH IDSEL: 0x1
0x7fffffff/0x7fffffff FWH IDSEL: 0x1
0x7fffffff/0x7fffffff FWH IDSEL: 0x2
0x7fffffff/0x7fffffff FWH IDSEL: 0x2
0x7fffffff/0x7fffffff FWH IDSEL: 0x3
0x7fffffff/0x7fffffff FWH IDSEL: 0x3
0x7fffffff/0x7fffffff FWH IDSEL: 0x4
0x7fffffff/0x7fffffff FWH IDSEL: 0x5
0x7fffffff/0x7fffffff FWH IDSEL: 0x6
0x7fffffff/0x7fffffff FWH IDSEL: 0x7
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
Maximum FWH chip size: 0x100000 bytes
BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled
Root Complex Register Block address = 0xfed1c000
GCS = 0xc65: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3800
0x04: 0xf008 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1
Warning: SPI Configuration Lockdown activated.
Reading OPCODES... done
        OP        Type      Pre-OP
op[0]: 0x02, write w/  addr, none
op[1]: 0x3b, read  w/  addr, none
op[2]: 0x20, write w/  addr, none
op[3]: 0x05, read  w/o addr, none
op[4]: 0x9f, read  w/o addr, none
op[5]: 0x01, write w/o addr, none
op[6]: 0x00, read  w/o addr, none
op[7]: 0x00, read  w/o addr, none
Pre-OP 0: 0x06, Pre-OP 1: 0x00
0x06: 0x0000 (HSFC)
HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
0x08: 0x00000000 (FADDR)
0x50: 0x0000ffff (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff
0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is
read-write.
0x58: 0x0fff0a00 FREG1: BIOS region (0x00a00000-0x00ffffff) is read-write.
0x5C: 0x09ff0001 FREG2: Management Engine region (0x00001000-0x009fffff) is
read-write.
0x60: 0x00007fff FREG3: Gigabit Ethernet region is unused.
0x64: 0x00007fff FREG4: Platform Data region is unused.
0x74: 0x00000000 (PR0 is unused)
0x78: 0x00000000 (PR1 is unused)
0x7C: 0x00000000 (PR2 is unused)
0x80: 0x00000000 (PR3 is unused)
0x84: 0x00000000 (PR4 is unused)
0x90: 0xc0 (SSFS)
SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0
0x91: 0xfc4010 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=0, SME=0, SCF=4
0x94: 0x0006     (PREOP)
0x96: 0x043b     (OPTYPE)
0x98: 0x05203b02 (OPMENU)
0x9C: 0x0000019f (OPMENU+4)
0xA0: 0x00000000 (BBAR)
0xC4: 0x80802025 (LVSCC)
LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1
0xC8: 0x00002025 (UVSCC)
UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0
0xD0: 0x50444653 (FPB)

Reading flash descriptors mapped by the chipset via FDOC/FDOD... done.
=== Content Section ===
FLVALSIG 0x0ff0a55a
FLMAP0   0x02040003
FLMAP1   0x15100206
FLMAP2   0x00210120

--- Details ---
NR          (Number of Regions):                     3
FRBA        (Flash Region Base Address):         0x040
NC          (Number of Components):                  1
FCBA        (Flash Component Base Address):      0x030
ISL         (ICH/PCH Strap Length):                 21
FISBA/FPSBA (Flash ICH/PCH Strap Base Address):  0x100
NM          (Number of Masters):                     3
FMBA        (Flash Master Base Address):         0x060
MSL/PSL     (MCH/PROC Strap Length):                 1
FMSBA       (Flash MCH/PROC Strap Base Address): 0x200

=== Component Section ===
FLCOMP   0x64900045
FLILL    0x00000000

--- Details ---
Component 1 density:            16 MB
Component 2 is not used.
Read Clock Frequency:           20 MHz
Read ID and Status Clock Freq.: 50 MHz
Write and Erase Clock Freq.:    50 MHz
Fast Read is supported.
Fast Read Clock Frequency:      50 MHz
No forbidden opcodes.

=== Region Section ===
FLREG0   0x00000000
FLREG1   0x0fff0a00
FLREG2   0x09ff0001
FLREG3   0x00007fff
FLREG4   0x00007fff

--- Details ---
Region 0 (Descr.) 0x00000000 - 0x00000fff
Region 1 (BIOS  ) 0x00a00000 - 0x00ffffff
Region 2 (ME    ) 0x00001000 - 0x009fffff
Region 3 (GbE   ) is unused.
Region 4 (Platf.) is unused.

=== Master Section ===
FLMSTR1  0xffff0000
FLMSTR2  0xffff0000
FLMSTR3  0xffff0118

--- Details ---
      Descr. BIOS ME GbE Platf.
BIOS    rw    rw  rw  rw   rw
ME      rw    rw  rw  rw   rw
GbE     rw    rw  rw  rw   rw

Enabling hardware sequencing because some important opcode is locked.
SPI Read Configuration: prefetching enabled, caching enabled, OK.
The following protocols are supported: FWH, Programmer-specific.
Probing for Programmer Opaque flash chip, 0 kB: Found 1 attached SPI flash
chip with a density of 16384 kB.
The flash address space (0x000000 - 0x9acfff) is divided at address 0x653000
in two partitions.
The first partition ranges from 0x000000 to 0x652fff.
In that range are 1619 erase blocks with 4096 B each.
The second partition ranges from 0x653000 to 0x9acfff.
In that range are 2477 erase blocks with 4096 B each.
Found Programmer flash chip "Opaque flash chip" (16384 kB,
Programmer-specific) at physical address 0x0.
Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xed, id2 0x88, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xed, id2 0x88,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x00, id2
0x03, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xed, id2
0x88, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xed, id2 0x88, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than
supported size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0x2d, id2 0xbd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xed, id2 0x88, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xed, id2 0x88, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported
size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0x2d, id2 0xbd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xed, id2 0x88, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xed, id2
0x88, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xed, id2
0x88, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xed, id2
0x88, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1
0xed, id2 0x88, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Found Programmer flash chip "Opaque flash chip" (16384 kB,
Programmer-specific).
No operations were specified.
Restoring MMIO space at 0x7f8aaebd48a0
Restoring PCI config space for 00:1f:0 reg 0xdc

Best regards,
Marek Zakrzewski





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