[flashrom] [PATCH 2/5] rayer_spi: Add Xilinx DLC-5 buffered version

[Kyösti Mälkki]

Pin 6 on LPT controls a pulldown on MISO/TDO signal.

Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
Acked-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 rayer_spi.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/rayer_spi.c b/rayer_spi.c
index cbbd5ce..28e8c9c 100644
--- a/rayer_spi.c
+++ b/rayer_spi.c
@@ -72,9 +72,22 @@ static struct rayer_pinout xilinx_dlc5 = {
 	.miso_bit = 4,
 };
 
+static void dlc5b_preinit(void *);
+static int dlc5b_shutdown(void *);
+
+static struct rayer_pinout xilinx_dlc5b = {
+	.cs_bit = 2,
+	.sck_bit = 1,
+	.mosi_bit = 0,
+	.miso_bit = 4,
+	.preinit =  dlc5b_preinit,
+	.shutdown = dlc5b_shutdown,
+};
+
 static struct rayer_programmer rayer_spi_types[] = {
 	{"rayer",	NT,	"RayeR SPIPGM",			  	&rayer_spipgm},
 	{"xilinx",	NT,	"Xilinx Parallel Cable III (DLC 5)", 	&xilinx_dlc5},
+	{"dlc-5b",	NT,	"Xilinx Parallel Cable III (DLC 5) (buffered)", 	&xilinx_dlc5b},
 	{0},
 };
 
@@ -197,6 +210,21 @@ int rayer_spi_init(void)
 	return 0;
 }
 
+static void dlc5b_preinit(void * data) {
+	msg_pdbg("dlc5b_preinit\n");
+	/* Assert pin 6 to receive MISO. */
+	lpt_outbyte |= (1<<4);
+	OUTB(lpt_outbyte, lpt_iobase);
+}
+
+static int dlc5b_shutdown(void * data) {
+	msg_pdbg("dlc5b_shutdown\n");
+	/* De-assert pin 6 to force MISO low. */
+	lpt_outbyte &= ~(1<<4);
+	OUTB(lpt_outbyte, lpt_iobase);
+	return 0;
+}
+
 #else
 #error PCI port I/O access is not supported on this architecture yet.
 #endif
-- 
1.8.1.1