[flashrom] 2 flashes on SPI bus

Stefan Tauner stefan.tauner at student.tuwien.ac.at
Sun Sep 23 14:10:33 CEST 2012


On Fri, 25 Jun 2010 00:11:26 +0400
xborodax at gmail.com (Andrei Dolnikov) wrote:

> Hello folks,
> 
> I would like to use a flashrom utility to access 2 serial flashes on
> the SPI bus of my x86 board, but I'm struggling with the second one.
> So I'm looking for any help, hints or advices which can help me to
> solve this issue.
> 
> I have custom x86 board (Atom n450 CPU, ICH8M chipset) which have 2
> serial flashes installed on it.
> The first one is SST25VF016B and the second one is Numonyx M45PE16.
> The M45PE16 is pretty the similar to the M25PE16.
> Both this chips are connected to the SPI bus of the ICH8M chipset, the
> CS (chip select) signal of the SST25VF is routed to the SPI_CS0 and
> the CS signal of the M45PE16 is routed to the SPI_CS1.
> I can successfully read, erase and write the SST flash.
> 
> Trying to figure out if flashrom utility can find the second Numonyx
> flash I've added the proper description for it to the flashchips.c
> (actually I've leaved it the same as for M25PE16 but changed model_id
> field). Unfortunately it didn't help me at all.
> 
> So I'm wondering if flashrom can't find M45PE16 flash because of
> cleared SPI_CS1 signal and how can I enable it?
> Does flashrom utility support such kind of configurations or does it
> simply searching for the flash on CS0?
> Probably some of you have some ideas on enabling SPI_CS1 or even some
> useful links etc.
> Unfortunately the official Intel ICH8M documentation looks kind of
> complicated and no so clear to me.
> I'll of course digg into it but any help, hints or advices are highly
> appreciated!

hi there!

you will probably find this information rather useless after more than 2
years, but i have imported the whole flashrom mailing list archive to my
MUA recently and skimmed through the old mails that were sent before i
joined.

i am not 100% sure if the following applies to ICH8 too (did not check
the datasheet again), but it is very likely. all intel chipsets since
the ICH8 have two access modes: software sequencing and hardware
sequencing. flashrom had only support for the former for a long time.
the problem is that there is no way to toggle the cs lines manually and
the chipset does this only in hwseq mode for the second chip. flashrom
got support for hwseq in the meantime (see the manpage) and should
support dual-chip solutions out of the box in general.

sorry for the short delay ;)
-- 
Kind regards/Mit freundlichen Grüßen, Stefan Tauner




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