[flashrom] Foxconn P55mx\H55mx

Владислав Быков vladislavbyk1 at gmail.com
Tue Oct 2 16:02:12 CEST 2012


No problem :3
Default jumper position (enabled):

> >> sudo flashrom -p internal -VV
> [sudo] password for vladislavbyk:
> flashrom v0.9.6.1-r1564 on Linux 3.5.4-1-ARCH (i686)
> flashrom is free software, get the source code at http://www.flashrom.org
>
> flashrom was built with libpci 3.1.10, GCC 4.7.1 20120721 (prerelease),
> little endian
> Command line (3 args): flashrom -p internal -VV
> Calibrating delay loop... OS timer resolution is 1 usecs, 1355M loops per
> second, 10 myus = 10 us, 100 myus = 97 us, 1000 myus = 1126 us, 10000 myus
> = 9925 us, 4 myus = 4 us, OK.
> Initializing internal programmer
> No coreboot table found.
> DMI string system-manufacturer: "To Be Filled By O.E.M."
> DMI string system-product-name: "To Be Filled By O.E.M."
> DMI string system-version: "To Be Filled By O.E.M."
> DMI string baseboard-manufacturer: "Foxconn"
> DMI string baseboard-product-name: "H55MX-S Series"
> DMI string baseboard-version: "1.1"
> DMI string chassis-type: "Desktop"
> Found ITE Super I/O, ID 0x8720 on port 0x2e
> Found chipset "Intel H55" with PCI ID 8086:3b06. Enabling flash write...
> 0xfff80000/0xffb80000 FWH IDSEL: 0x0
> 0xfff00000/0xffb00000 FWH IDSEL: 0x0
> 0xffe80000/0xffa80000 FWH IDSEL: 0x1
> 0xffe00000/0xffa00000 FWH IDSEL: 0x1
> 0xffd80000/0xff980000 FWH IDSEL: 0x2
> 0xffd00000/0xff900000 FWH IDSEL: 0x2
> 0xffc80000/0xff880000 FWH IDSEL: 0x3
> 0xffc00000/0xff800000 FWH IDSEL: 0x3
> 0xff700000/0xff300000 FWH IDSEL: 0x4
> 0xff600000/0xff200000 FWH IDSEL: 0x5
> 0xff500000/0xff100000 FWH IDSEL: 0x6
> 0xff400000/0xff000000 FWH IDSEL: 0x7
> 0xfff80000/0xffb80000 FWH decode enabled
> 0xfff00000/0xffb00000 FWH decode enabled
> 0xffe80000/0xffa80000 FWH decode disabled
> 0xffe00000/0xffa00000 FWH decode disabled
> 0xffd80000/0xff980000 FWH decode disabled
> 0xffd00000/0xff900000 FWH decode disabled
> 0xffc80000/0xff880000 FWH decode disabled
> 0xffc00000/0xff800000 FWH decode disabled
> 0xff700000/0xff300000 FWH decode disabled
> 0xff600000/0xff200000 FWH decode disabled
> 0xff500000/0xff100000 FWH decode disabled
> 0xff400000/0xff000000 FWH decode disabled
> Maximum FWH chip size: 0x100000 bytes
> BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x8
> Root Complex Register Block address = 0xfed1c000
> GCS = 0xc64: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3
> (SPI)
> Top Swap : not enabled
> SPIBAR = 0xfed1c000 + 0x3800
> 0x04: 0x6008 (HSFS)
> HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0
> Programming OPCODES...
> program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
> done
>         OP        Type      Pre-OP
> op[0]: 0x02, write w/  addr, none
> op[1]: 0x03, read  w/  addr, none
> op[2]: 0xd8, write w/  addr, none
> op[3]: 0x05, read  w/o addr, none
> op[4]: 0x90, read  w/  addr, none
> op[5]: 0x01, write w/o addr, none
> op[6]: 0x9f, read  w/o addr, none
> op[7]: 0xc7, write w/o addr, none
> Pre-OP 0: 0x06, Pre-OP 1: 0x50
> 0x06: 0x0000 (HSFC)
> HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
> 0x08: 0x00000000 (FADDR)
> 0x50: 0x00000a0b (FRAP)
> BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b
> 0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region
> (0x00000000-0x00000fff) is read-only.
> 0x58: 0x07ff0700 FREG1: BIOS region (0x00700000-0x007fffff) is read-write.
> 0x5C: 0x06ff0001 FREG2: WARNING: Management Engine region
> (0x00001000-0x006fffff) is locked.
> 0x60: 0x00001fff FREG3: Gigabit Ethernet region is unused.
> 0x64: 0x00001fff FREG4: Platform Data region is unused.
> 0x74: 0x00000000 (PR0 is unused)
> 0x78: 0x00000000 (PR1 is unused)
> 0x7C: 0x00000000 (PR2 is unused)
> 0x80: 0x00000000 (PR3 is unused)
> 0x84: 0x00000000 (PR4 is unused)
> Please send a verbose log to flashrom at flashrom.org if this board is not
> listed on
> http://flashrom.org/Supported_hardware#Supported_mainboards yet.
> Writes have been disabled. You can enforce write support with the
> ich_spi_force programmer option, but it will most likely harm your
> hardware!
> If you force flashrom you will get no support if something breaks.
> 0x90: 0x00 (SSFS)
> SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0
> 0x91: 0xf84200 (SSFC)
> SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=2, SME=0, SCF=0
> 0x94: 0x5006     (PREOP)
> 0x96: 0x463b     (OPTYPE)
> 0x98: 0x05d80302 (OPMENU)
> 0x9C: 0xc79f0190 (OPMENU+4)
> 0xA0: 0x00000000 (BBAR)
> 0xC4: 0x00000000 (LVSCC)
> LVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x0, VCL=0
> 0xC8: 0x00002001 (UVSCC)
> UVSCC: BES=0x1, WG=0, WSR=0, WEWS=0, EO=0x20, VCL=0
> 0xD0: 0x00000000 (FPB)
>
> Reading flash descriptors mapped by the chipset via FDOC/FDOD... done.
> === Content Section ===
> FLVALSIG 0x0ff0a55a
> FLMAP0   0x02040102
> FLMAP1   0x10100206
> FLMAP2   0x00000020
>
> --- Details ---
> NR          (Number of Regions):                     3
> FRBA        (Flash Region Base Address):         0x040
> NC          (Number of Components):                  2
> FCBA        (Flash Component Base Address):      0x020
> ISL         (ICH/PCH Strap Length):                 16
> FISBA/FPSBA (Flash ICH/PCH Strap Base Address):  0x100
> NM          (Number of Masters):                     3
> FMBA        (Flash Master Base Address):         0x060
> MSL/PSL     (MCH/PROC Strap Length):                 0
> FMSBA       (Flash MCH/PROC Strap Base Address): 0x200
>
> === Component Section ===
> FLCOMP   0x0930001b
> FLILL    0x00000000
>
> --- Details ---
> Component 1 density:             4 MB
> Component 2 density:             4 MB
> Read Clock Frequency:           20 MHz
> Read ID and Status Clock Freq.: 33 MHz
> Write and Erase Clock Freq.:    33 MHz
> Fast Read is supported.
> Fast Read Clock Frequency:      33 MHz
> No forbidden opcodes.
>
> === Region Section ===
> FLREG0   0x00000000
> FLREG1   0x07ff0700
> FLREG2   0x06ff0001
> FLREG3   0x00001fff
>
> --- Details ---
> Region 0 (Descr.) 0x00000000 - 0x00000fff
> Region 1 (BIOS  ) 0x00700000 - 0x007fffff
> Region 2 (ME    ) 0x00001000 - 0x006fffff
> Region 3 (GbE   ) is unused.
>
> === Master Section ===
> FLMSTR1  0x0a0b0000
> FLMSTR2  0x0c0d0000
> FLMSTR3  0x08080118
>
> --- Details ---
>       Descr. BIOS ME GbE Platf.
> BIOS    r     rw      rw
> ME      r         rw  rw
> GbE                   rw
>
> Enabling hardware sequencing due to multiple flash chips detected.
> SPI Read Configuration: prefetching enabled, caching enabled, OK.
> No IT87* serial flash segment enabled.
> The following protocols are supported: FWH, Programmer-specific.
> Probing for Programmer Opaque flash chip, 0 kB: Found 2 attached SPI flash
> chips with a combined density of 8192 kB.
> There is only one partition containing the whole address space (0x000000 -
> 0x7fffff).
> There are 2048 erase blocks with 4096 B each.
> Found Programmer flash chip "Opaque flash chip" (8192 kB,
> Programmer-specific) at physical address 0x0.
> Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x41, id2 0x4d,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x14, id2 0x8c, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x4e, id2 0x56, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x41, id2 0x4d,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x14, id2 0x8c,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x4e, id2 0x56,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x41, id2
> 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x02, id2
> 0x00, id1 is normal flash content, id2 is normal flash content
> Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x14, id2
> 0x8c, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x14, id2 0x8c,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x4e, id2
> 0x56, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x4e, id2 0x56,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than
> supported size 1024 kB of chipset/board/programmer for FWH interface,
> probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x14, id2 0x8c, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x14, id2 0x8c, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x4e, id2 0x56, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x4e, id2 0x56, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x41, id2 0x4d, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than
> supported size 1024 kB of chipset/board/programmer for FWH interface,
> probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x14, id2 0x8c, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x4e, id2 0x56, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x14, id2
> 0x8c, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x14, id2
> 0x8c, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x14, id2
> 0x8c, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x41, id2
> 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x4e, id2
> 0x56, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1
> 0x14, id2 0x8c, id1 parity violation, id1 is normal flash content, id2 is
> normal flash content
> Found Programmer flash chip "Opaque flash chip" (8192 kB,
> Programmer-specific).
> No operations were specified.
> Restoring MMIO space at 0xb77908a0
> Restoring MMIO space at 0xb779089c
> Restoring MMIO space at 0xb7790898
> Restoring MMIO space at 0xb7790896
> Restoring MMIO space at 0xb7790894
> Restoring PCI config space for 00:1f:0 reg 0xdc
>  >>
>

Disabled:

> ^[[A%
> >> sudo flashrom -p internal -VV
> [sudo] password for vladislavbyk:
> flashrom v0.9.6.1-r1564 on Linux 3.5.4-1-ARCH (i686)
> flashrom is free software, get the source code at http://www.flashrom.org
>
> flashrom was built with libpci 3.1.10, GCC 4.7.1 20120721 (prerelease),
> little endian
> Command line (3 args): flashrom -p internal -VV
> Calibrating delay loop... OS timer resolution is 1 usecs, 1328M loops per
> second, 10 myus = 9 us, 100 myus = 96 us, 1000 myus = 1083 us, 10000 myus =
> 9907 us, 4 myus = 3 us, OK.
> Initializing internal programmer
> No coreboot table found.
> DMI string system-manufacturer: "To Be Filled By O.E.M."
> DMI string system-product-name: "To Be Filled By O.E.M."
> DMI string system-version: "To Be Filled By O.E.M."
> DMI string baseboard-manufacturer: "Foxconn"
> DMI string baseboard-product-name: "H55MX-S Series"
> DMI string baseboard-version: "1.1"
> DMI string chassis-type: "Desktop"
> Found ITE Super I/O, ID 0x8720 on port 0x2e
> Found chipset "Intel H55" with PCI ID 8086:3b06. Enabling flash write...
> 0xfff80000/0xffb80000 FWH IDSEL: 0x0
> 0xfff00000/0xffb00000 FWH IDSEL: 0x0
> 0xffe80000/0xffa80000 FWH IDSEL: 0x1
> 0xffe00000/0xffa00000 FWH IDSEL: 0x1
> 0xffd80000/0xff980000 FWH IDSEL: 0x2
> 0xffd00000/0xff900000 FWH IDSEL: 0x2
> 0xffc80000/0xff880000 FWH IDSEL: 0x3
> 0xffc00000/0xff800000 FWH IDSEL: 0x3
> 0xff700000/0xff300000 FWH IDSEL: 0x4
> 0xff600000/0xff200000 FWH IDSEL: 0x5
> 0xff500000/0xff100000 FWH IDSEL: 0x6
> 0xff400000/0xff000000 FWH IDSEL: 0x7
> 0xfff80000/0xffb80000 FWH decode enabled
> 0xfff00000/0xffb00000 FWH decode enabled
> 0xffe80000/0xffa80000 FWH decode disabled
> 0xffe00000/0xffa00000 FWH decode disabled
> 0xffd80000/0xff980000 FWH decode disabled
> 0xffd00000/0xff900000 FWH decode disabled
> 0xffc80000/0xff880000 FWH decode disabled
> 0xffc00000/0xff800000 FWH decode disabled
> 0xff700000/0xff300000 FWH decode disabled
> 0xff600000/0xff200000 FWH decode disabled
> 0xff500000/0xff100000 FWH decode disabled
> 0xff400000/0xff000000 FWH decode disabled
> Maximum FWH chip size: 0x100000 bytes
> BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x8
> Root Complex Register Block address = 0xfed1c000
> GCS = 0xc64: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3
> (SPI)
> Top Swap : not enabled
> SPIBAR = 0xfed1c000 + 0x3800
> 0x04: 0x4008 (HSFS)
> HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=0, FDV=1, FLOCKDN=0
> The Flash Descriptor Security Override Strap-Pin is set. Restrictions
> implied
> by the FRAP and FREG registers are NOT in effect. Please note that
> Protected
> Range (PR) restrictions still apply.
> Programming OPCODES...
> program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
> done
>         OP        Type      Pre-OP
> op[0]: 0x02, write w/  addr, none
> op[1]: 0x03, read  w/  addr, none
> op[2]: 0xd8, write w/  addr, none
> op[3]: 0x05, read  w/o addr, none
> op[4]: 0x90, read  w/  addr, none
> op[5]: 0x01, write w/o addr, none
> op[6]: 0x9f, read  w/o addr, none
> op[7]: 0xc7, write w/o addr, none
> Pre-OP 0: 0x06, Pre-OP 1: 0x50
> 0x06: 0x0000 (HSFC)
> HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
> 0x08: 0x00000000 (FADDR)
> 0x50: 0x0000ffff (FRAP)
> BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff
> 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is
> read-write.
> 0x58: 0x07ff0700 FREG1: BIOS region (0x00700000-0x007fffff) is read-write.
> 0x5C: 0x06ff0001 FREG2: Management Engine region (0x00001000-0x006fffff)
> is read-write.
> 0x60: 0x00001fff FREG3: Gigabit Ethernet region is unused.
> 0x64: 0x00001fff FREG4: Platform Data region is unused.
> 0x74: 0x00000000 (PR0 is unused)
> 0x78: 0x00000000 (PR1 is unused)
> 0x7C: 0x00000000 (PR2 is unused)
> 0x80: 0x00000000 (PR3 is unused)
> 0x84: 0x00000000 (PR4 is unused)
> 0x90: 0x00 (SSFS)
> SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0
> 0x91: 0xf84200 (SSFC)
> SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=2, SME=0, SCF=0
> 0x94: 0x5006     (PREOP)
> 0x96: 0x463b     (OPTYPE)
> 0x98: 0x05d80302 (OPMENU)
> 0x9C: 0xc79f0190 (OPMENU+4)
> 0xA0: 0x00000000 (BBAR)
> 0xC4: 0x00000000 (LVSCC)
> LVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x0, VCL=0
> 0xC8: 0x00002001 (UVSCC)
> UVSCC: BES=0x1, WG=0, WSR=0, WEWS=0, EO=0x20, VCL=0
> 0xD0: 0x00000000 (FPB)
>
> Reading flash descriptors mapped by the chipset via FDOC/FDOD... done.
> === Content Section ===
> FLVALSIG 0x0ff0a55a
> FLMAP0   0x02040102
> FLMAP1   0x10100206
> FLMAP2   0x00000020
>
> --- Details ---
> NR          (Number of Regions):                     3
> FRBA        (Flash Region Base Address):         0x040
> NC          (Number of Components):                  2
> FCBA        (Flash Component Base Address):      0x020
> ISL         (ICH/PCH Strap Length):                 16
> FISBA/FPSBA (Flash ICH/PCH Strap Base Address):  0x100
> NM          (Number of Masters):                     3
> FMBA        (Flash Master Base Address):         0x060
> MSL/PSL     (MCH/PROC Strap Length):                 0
> FMSBA       (Flash MCH/PROC Strap Base Address): 0x200
>
> === Component Section ===
> FLCOMP   0x0930001b
> FLILL    0x00000000
>
> --- Details ---
> Component 1 density:             4 MB
> Component 2 density:             4 MB
> Read Clock Frequency:           20 MHz
> Read ID and Status Clock Freq.: 33 MHz
> Write and Erase Clock Freq.:    33 MHz
> Fast Read is supported.
> Fast Read Clock Frequency:      33 MHz
> No forbidden opcodes.
>
> === Region Section ===
> FLREG0   0x00000000
> FLREG1   0x07ff0700
> FLREG2   0x06ff0001
> FLREG3   0x00001fff
>
> --- Details ---
> Region 0 (Descr.) 0x00000000 - 0x00000fff
> Region 1 (BIOS  ) 0x00700000 - 0x007fffff
> Region 2 (ME    ) 0x00001000 - 0x006fffff
> Region 3 (GbE   ) is unused.
>
> === Master Section ===
> FLMSTR1  0x0a0b0000
> FLMSTR2  0x0c0d0000
> FLMSTR3  0x08080118
>
> --- Details ---
>       Descr. BIOS ME GbE Platf.
> BIOS    r     rw      rw
> ME      r         rw  rw
> GbE                   rw
>
> Enabling hardware sequencing due to multiple flash chips detected.
> SPI Read Configuration: prefetching enabled, caching enabled, OK.
> No IT87* serial flash segment enabled.
> The following protocols are supported: FWH, Programmer-specific.
> Probing for Programmer Opaque flash chip, 0 kB: Found 2 attached SPI flash
> chips with a combined density of 8192 kB.
> There is only one partition containing the whole address space (0x000000 -
> 0x7fffff).
> There are 2048 erase blocks with 4096 B each.
> Found Programmer flash chip "Opaque flash chip" (8192 kB,
> Programmer-specific) at physical address 0x0.
> Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x41, id2 0x4d,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x14, id2 0x8c, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x4e, id2 0x56, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x41, id2 0x4d,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x14, id2 0x8c,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x4e, id2 0x56,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x41, id2
> 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x02, id2
> 0x00, id1 is normal flash content, id2 is normal flash content
> Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x14, id2
> 0x8c, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x14, id2 0x8c,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x4e, id2
> 0x56, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x4e, id2 0x56,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than
> supported size 1024 kB of chipset/board/programmer for FWH interface,
> probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x14, id2 0x8c, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x14, id2 0x8c, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x4e, id2 0x56, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x4e, id2 0x56, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x41, id2 0x4d, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than
> supported size 1024 kB of chipset/board/programmer for FWH interface,
> probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x14, id2 0x8c, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x4e, id2 0x56, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x14, id2
> 0x8c, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x14, id2
> 0x8c, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x14, id2
> 0x8c, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x41, id2
> 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x4e, id2
> 0x56, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1
> 0x14, id2 0x8c, id1 parity violation, id1 is normal flash content, id2 is
> normal flash content
> Found Programmer flash chip "Opaque flash chip" (8192 kB,
> Programmer-specific).
> No operations were specified.
> Restoring MMIO space at 0xb77438a0
> Restoring MMIO space at 0xb774389c
> Restoring MMIO space at 0xb7743898
> Restoring MMIO space at 0xb7743896
> Restoring MMIO space at 0xb7743894
> Restoring PCI config space for 00:1f:0 reg 0xdc
>

Btw, maybe you have jabber or icq? :) It would be convenient)
2012/10/2 Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

> On Tue, 2 Oct 2012 17:41:21 +0400
> Владислав Быков <vladislavbyk1 at gmail.com> wrote:
>
> > Yep, i toggle jumper, it's named MFG. It's should be disable (writed to
> > mainboard manual) until i start flash.
>
> Ok, thanks, can you please run "flashrom -p internal -VV" with the
> jumper in the previous/untoggled/default position and send us the
> output? I would like to know if/how the contents of the registers
> change by this exactly. This is not clearly documented publicly by
> Intel but might be helpful to us in the future.
>
> --
> Kind regards/Mit freundlichen Grüßen, Stefan Tauner
>
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