[flashrom] [PATCH] TunnelCreek uses ICH7 SPI instead of poulsbo

Paul Menzel paulepanter at users.sourceforge.net
Fri Jan 27 11:12:35 CET 2012

Dear Markus,

thank you for the patch.

Am Freitag, den 27.01.2012, 10:14 +0100 schrieb Markus Pietrek:
> While LPC/FHW is not supported on TunnelCreek, SPI is (see TunnelCreek's 
> HW ref manual 2.13)
> The SPI controller is compatible to ICH7
> Reading has been tested on Q7_TCTC using the command "flashrom -p 
> internal:laptop=force_I_want_a_brick -r /tmp/test.bin"
> Writing has not been verified!

Before the patch can be submitted could you please send the output of
the command above (with `-V` added) to the list, put the URL to the
archive entry to the commit message and add your Signed-off-by line [1]?
That would be awesome.

Since you have tested it, please add

Acked-by: Paul Menzel <paulepanter at users.sourceforge.net>

to the commit message, although I am puzzled why this entry has been
added in the first place.

And last but not least, your MUA Thunderbird mangled the patch by adding
automatic line breaks. So please turn those of when resending the patch.

> ---
>   chipset_enable.c |    2 +-
>   1 files changed, 1 insertions(+), 1 deletions(-)
> diff --git a/chipset_enable.c b/chipset_enable.c
> index 21990f6..dc97703 100644
> --- a/chipset_enable.c
> +++ b/chipset_enable.c
> @@ -1217,7 +1217,7 @@ const struct penable chipset_enables[] = {
>       {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M",    enable_flash_piix4},
>       {0x8086, 0x7198, OK, "Intel", "440MX",        enable_flash_piix4},
>       {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo",    enable_flash_poulsbo},
> -    {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_poulsbo},
> +    {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_ich7},
>   #endif
>       {},
>   };



[1] http://flashrom.org/Development_Guidelines
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