[flashrom] FAILED : mcp61sm -am

[Stefan Tauner]

On Thu, 9 Feb 2012 08:25:51 +0100
Vince S <vince06fr at gmail.com> wrote:

> Hi so the output of my attempt to flash is
> 
> sudo flashrom -V -w '/home/vince/Téléchargements/BIOS_R01-C0/61AO615.BIN'
> 
> flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (x86_64), built with libpci
> 3.1.7, GCC 4.6.1, little endian
> flashrom is free software, get the source code at http://www.flashrom.org
> 
> Calibrating delay loop... OS timer resolution is 1 usecs, 736M loops per
> second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 1007 us, 10000 myus
> = 10003 us, 4 myus = 5 us, OK.
> Initializing internal programmer
> No coreboot table found.
> DMI string system-manufacturer: "Acer"
> DMI string system-product-name: "Aspire E380"
> DMI string system-version: "R01-A2"
> DMI string baseboard-manufacturer: "Acer"
> DMI string baseboard-product-name: "EM61SM/EM61PM         "
> DMI string baseboard-version: " "
> DMI string chassis-type: "Desktop"
> Found ITE Super I/O, ID 0x8726 on port 0x2e
> Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0.
> This chipset is marked as untested. If you are using an up-to-date version
> of flashrom please email a report to flashrom at flashrom.org including a
> verbose (-V) log. Thank you!
> Enabling flash write... This chipset is not really supported yet.
> Guesswork...
> ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0
> Flash bus type is LPC
> Found SMBus device 10de:03eb at 00:01:1
> MCP SPI BAR is at 0xfec80000
> Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI
> enabled.
> Please send the output of "flashrom -V" to flashrom at flashrom.org with
> your board name: flashrom -V as the subject to help us finish support for
> your
> chipset. Thanks.
> OK.
> This chipset supports the following protocols: LPC.
> Super I/O ID 0x8726 is not on the list of flash capable controllers.
> Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Found SST flash chip "SST49LF040B" (512 kB, LPC) at physical address
> 0xfff80000.
> […]
> ===
> This flash part has status UNTESTED for operations: WRITE
> The test status of this chip may have been updated in the latest development
> version of flashrom. If you are running the latest development version,
> please email a report to flashrom at flashrom.org if any of the above
> operations
> work correctly for you with this flash part. Please include the flashrom
> output with the additional -V option for all operations you tested (-V, -Vr,
> -Vw, -VE), and mention which mainboard or programmer you tested.
> Please mention your board in the subject line. Thanks for your help!
> Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
> Reading old flash chip contents... done.
> Erasing and writing flash chip... Trying erase function 0...
> 0x000000-0x000fff:W, 0x001000-0x001fff:S, 0x002000-0x002fff:S,
> 0x003000-0x003fff:S, 0x004000-0x004fff:S, 0x005000-0x005fff:S,
> 0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:S,
> 0x009000-0x009fff:S, 0x00a000-0x00afff:S, 0x00b000-0x00bfff:S,
> 0x00c000-0x00cfff:S, 0x00d000-0x00dfff:S, 0x00e000-0x00efff:S,
> 0x00f000-0x00ffff:S, 0x010000-0x010fff:W, 0x011000-0x011fff:W,
> 0x012000-0x012fff:W, 0x013000-0x013fff:W, 0x014000-0x014fff:W,
> 0x015000-0x015fff:W, 0x016000-0x016fff:W, 0x017000-0x017fff:W,
> 0x018000-0x018fff:W, 0x019000-0x019fff:W, 0x01a000-0x01afff:W,
> 0x01b000-0x01bfff:W, 0x01c000-0x01cfff:W, 0x01d000-0x01dfff:W,
> 0x01e000-0x01efff:W, 0x01f000-0x01ffff:W, 0x020000-0x020fff:W,
> 0x021000-0x021fff:W, 0x022000-0x022fff:W, 0x023000-0x023fff:W,
> 0x024000-0x024fff:W, 0x025000-0x025fff:W, 0x026000-0x026fff:W,
> 0x027000-0x027fff:W, 0x028000-0x028fff:W, 0x029000-0x029fff:W,
> 0x02a000-0x02afff:W, 0x02b000-0x02bfff:W, 0x02c000-0x02cfff:W,
> 0x02d000-0x02dfff:W, 0x02e000-0x02efff:W, 0x02f000-0x02ffff:W,
> 0x030000-0x030fff:W, 0x031000-0x031fff:W, 0x032000-0x032fff:W,
> 0x033000-0x033fff:W, 0x034000-0x034fff:W, 0x035000-0x035fff:W,
> 0x036000-0x036fff:W, 0x037000-0x037fff:W, 0x038000-0x038fff:W,
> 0x039000-0x039fff:W, 0x03a000-0x03afff:W, 0x03b000-0x03bfff:W,
> 0x03c000-0x03cfff:W, 0x03d000-0x03dfff:W, 0x03e000-0x03efff:W,
> 0x03f000-0x03ffff:W, 0x040000-0x040fff:W, 0x041000-0x041fff:W,
> 0x042000-0x042fff:W, 0x043000-0x043fff:W, 0x044000-0x044fff:W,
> 0x045000-0x045fff:W, 0x046000-0x046fff:W, 0x047000-0x047fff:W,
> 0x048000-0x048fff:W, 0x049000-0x049fff:W, 0x04a000-0x04afff:W,
> 0x04b000-0x04bfff:W, 0x04c000-0x04cfff:W, 0x04d000-0x04dfff:W,
> 0x04e000-0x04efff:W, 0x04f000-0x04ffff:W, 0x050000-0x050fff:W,
> 0x051000-0x051fff:W, 0x052000-0x052fff:W, 0x053000-0x053fff:W,
> 0x054000-0x054fff:W, 0x055000-0x055fff:W, 0x056000-0x056fff:S,
> 0x057000-0x057fff:S, 0x058000-0x058fff:S, 0x059000-0x059fff:S,
> 0x05a000-0x05afff:S, 0x05b000-0x05bfff:S, 0x05c000-0x05cfff:S,
> 0x05d000-0x05dfff:S, 0x05e000-0x05efff:S, 0x05f000-0x05ffff:S,
> 0x060000-0x060fff:S, 0x061000-0x061fff:S, 0x062000-0x062fff:S,
> 0x063000-0x063fff:S, 0x064000-0x064fff:S, 0x065000-0x065fff:S,
> 0x066000-0x066fff:S, 0x067000-0x067fff:S, 0x068000-0x068fff:S,
> 0x069000-0x069fff:S, 0x06a000-0x06afff:W, 0x06b000-0x06bfff:W,
> 0x06c000-0x06cfff:W, 0x06d000-0x06dfff:W, 0x06e000-0x06efff:W,
> 0x06f000-0x06ffff:W, 0x070000-0x070fff:W writing sector at 0x7f28ed976000
> failed!
> Reading current flash chip contents... done. Looking for another erase
> function.
> Trying erase function 1... 0x000000-0x00ffff:S, 0x010000-0x01ffff:S,
> 0x020000-0x02ffff:S, 0x030000-0x03ffff:S, 0x040000-0x04ffff:S,
> 0x050000-0x05ffff:S, 0x060000-0x06ffff:S, 0x070000-0x07ffff:W writing
> sector at 0x7f28ed976000 failed!
> Looking for another erase function.
> No usable erase functions left.
> FAILED!
> Uh oh. Erase/write failed. Checking if anything changed.
> Your flash chip is in an unknown state.
> Get help on IRC at irc.freenode.net (channel #flashrom) or
> mail flashrom at flashrom.org with FAILED: your board name in the subject line!
> -------------------------------------------------------------------------------
> DO NOT REBOOT OR POWEROFF!
> Restoring PCI config space for 00:01:0 reg 0x6d
> Restoring PCI config space for 00:01:0 reg 0x90
> Restoring PCI config space for 00:01:0 reg 0x8c
> Restoring PCI config space for 00:01:0 reg 0x88

that's interesting. it always fails at the same address (0x070000).
this is where the boot block protection of that chip begins. the boot
block protection is enabled by setting a pin to low and can not be
disabled directly by software. usually the pin is connected to a
general output pin of the southbridge (or another chip) on the mainboard
and can be controlled by that. adding support for this requires some
reverse engineering of various difficulty.

the interesting question is something different: why were we able to
erase that block a month ago...
can you confirm that the two chips you are using are the same model?

> 
> what can i do??

since you have a replacement chip, you could just throw the old one
away... i would really like to know what happened though. maybe my
colleagues can shed some light onto this...

-- 
Kind regards/Mit freundlichen Grüßen, Stefan Tauner