[flashrom] [SPAM?]Re: [PATCH] revamp the warning of failing to set BIOS write enable in enable_flash_ich

[Feldschmid, Ingo]

I changed my local copy of the flashrom trunk to never set the write-enable-bit. Then, on the target machine, I double-checked with lspci that the bit isn't set. Next, I called "flashrom -w bios.bin" to let it try & write to the flash chip. 

As a result, I got flashrom errors, telling me that it couldn't erase the chip: 

>> Erasing and writing flash chip contents... Transaction error!
>> spi_block_erase_20 failed during command execution at address 0xe3000
>> ...
>> spi_block_erase_52 failed during command execution at address 0xe3000
>> ...
>> spi_block_erase_d8 failed during command execution at address 0xe0000
>> ...
>> spi_block_erase_60 failed during command execution
>> ...
>> spi_block_erase_c7 failed during command execution
>> ...
>> FAILED!
>> Uh oh. Erase/write failed. Checking if anything changed. 
>> Good. It seems nothing was changed. 
>> Writing to the flash chip apparently didn't do anything. 

Furthermore, a colleague told that they actually once have read the SPI accesses with a osci, and that no write / erase cycles have been executed without this bit set (sry don't have proof for that right now). 



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-----Ursprüngliche Nachricht-----
Von: Stefan Tauner [mailto:stefan.tauner at student.tuwien.ac.at] 
Gesendet: Mittwoch, 14. September 2011 14:03
An: Feldschmid, Ingo
Cc: flashrom at flashrom.org
Betreff: [SPAM?]Re: [flashrom] [PATCH] revamp the warning of failing to set BIOS write enable in enable_flash_ich

On Wed, 14 Sep 2011 13:51:04 +0200
"Feldschmid, Ingo" <ifel at msc-ge.com> wrote:

> I checked with some boards with different Intel chipsets (some ICHx and Tunnel Creeks), and the bios write enable bit does affect the SPI bus. It will quite likely be ignored for PCI accesses, but everything that goes through the chipset is affected by this bit. So if this bit is not set, write accesses to the bios flash will not be clocked to the SPI bus.

what have you "checked" exactly? did you try clearing the bit, issuing
SPI commands and looked at the physical bus?
it's a pity that the public data sheets do not provide a clear
statement regarding this bit.

-- 
Kind regards/Mit freundlichen Grüßen, Stefan Tauner