[flashrom] [patch] Add board enable for ABIT AV8
christophg+cb at grenz-bonn.de
Fri Oct 7 01:40:49 CEST 2011
Am Donnerstag, 6. Oktober 2011, um 23:27:32 schrieb Stefan Tauner:
> On Sat, 1 Oct 2011 08:04:44 +0200
> Christoph Grenz <christophg+cb at grenz-bonn.de> wrote:
> > adds board enable for ABIT AV8 (first revision).
> > Signed-off-by: Christoph Grenz <christophg+cb at grenz-bonn.de>
> hello christoph and thanks for the patch!
> i guess you own such a board and have tested the board enable yourself?
> could you please provide a verbose log of its action?
> also we would like to see lspci -nn and lspci -xxnnvvv logs to verify
> that the pci ids are well chosen.
Yes, i own it and tested the board enable.
The board's temporarily in use by a family member, but I can provide a verbose
log in about a week.
Ok, I'll append the lspci outputs for verification when I send the verbose
log. (btw, I chose the pci ids by the K8 host bride (00:00.0) and the SuperIO
> i cant really comment the enabling function itself besides that it
> maybe it would make sense to add a more general function to set/clear
> GPO on that chipset? though that is probably overkill yet.
> how did you find out what to do? is there a public datasheet? etc.
> please tell us the story :)
I disassembled the write enable and the write disable functions from the Award
BIOS image and reconstructed C code to understand for myself what happens.
(Only took me half a night, until this weekend I have semester break, so I had
spare time ;-) )
The ABIT AV8 board uses both the VT8237 chipset write protection, which is
already handled by the code in chipset_enable.c, and the write protection I
handled in my patch, which apparently is connected to some GPIO ports. After
reading the DSDT I found they were called GP22 und GP23 in a region called
GPOB (0x404C-0x404F). I can't really tell which chip they are connected to and
found no writes to the same region in another board enable function, so I
didn't add a general function.
I attached the C code I reconstructed from the bios image to this mail.
> btw i think we usually use the designation "rev. 1.0" (or whatever the
> vendor used) instead of "first revision". did you name it yourself like
> that or was it documented by abit that way?
I named it myself like that because I couldn't find any reference to a
revision number by abit, but as there is a board AV8-3rd-Eye which slightly
differs from the original AV8 and as I don't own it I couldn't test if it
works the same way, so I just wanted to add an indicator which revision I
tested on. So I could change it to "rev. 1.0" or omit it if that's better.
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