[flashrom] [PATCH] Remove delays in JEDEC erase sequence

[Carl-Daniel Hailfinger]

Auf 06.03.2011 20:11, Michael Karcher schrieb:
> t is extremely unlikely that a chip not requiring delays in probe does
> require them in erase. We observed unreliable erasing with a SST49LF004A
> with these delays, so remove them if the are not required.
>
> Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
> ---
>  jedec.c |   33 +++++++++++++++++++++------------
>  1 files changed, 21 insertions(+), 12 deletions(-)
>
> diff --git a/jedec.c b/jedec.c
> index 199c64d..822de88 100644
> --- a/jedec.c
> +++ b/jedec.c
> @@ -242,21 +242,24 @@ static int erase_sector_jedec_common(struct flashchip *flash, unsigned int page,
>  			      unsigned int pagesize, unsigned int mask)
>  {
>  	chipaddr bios = flash->virtual_memory;
> +	int delay_us = 10;
> +	if(flash->probe_timing != TIMING_ZERO)
> +	        delay_us = 0;
>   

Inverted logic. Could you fix the logic like this:

+	int delay_us = 0;
+	if(flash->probe_timing != TIMING_ZERO)
+	        delay_us = 10;


Default to 0 delay, and only change it if the chip is slow.

>  
>  	/*  Issue the Sector Erase command   */
>  	chip_writeb(0xAA, bios + (0x5555 & mask));
> -	programmer_delay(10);
> +	programmer_delay(delay_us);
>   

probe_jedec goes further by making that call conditional on nonzero
delay. I don't have a strong preference, but wanted to mention it.

Anyway, with the logic fix this is
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Regards,
Carl-Daniel

-- 
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