[flashrom] [PATCH 1/1] Board-enable for GA-K8N51GMF

[Michael Karcher]

(VERIFIED to contain the right patch)

Gigabyte is not really helpful with their PCI IDs for us, the subsystem
IDs used just mean "gigabyte northbridge" and "gigabyte southbridge".
We should investigate whether autodetection of this board is causing
interference with other boards.

real version 2: Extend list of PCI IDs for nvidia southbridges.

flashrom -V: http://paste.flashrom.org/view.php?id=326
lspic: http://paste.flashrom.org/view.php?id=328
superiotool: http://paste.flashrom.org/view.php?id=329

Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
---
 board_enable.c |    5 ++++-
 print.c        |    1 +
 2 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/board_enable.c b/board_enable.c
index 5776bf5..75adc9e 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -866,6 +866,7 @@ static int nvidia_mcp_gpio_set(int gpio, int raise)
 	case 0x00E0: /* CK8 */
 		break;
 	case 0x0260: /* MCP51 */
+	case 0x0261: /* MCP51 */
 	case 0x0364: /* MCP55 */
 		/* find SMBus controller on *this* southbridge */
 		/* The infamous Tyan S2915-E has two south bridges; they are
@@ -1026,7 +1027,8 @@ static int nvidia_mcp_gpio31_raise(void)
 
 /*
  * Suited for:
- *  - GIGABYTE GA-K8N51GMF-9
+ *  - GIGABYTE GA-K8N51GMF: Socket 754 + Geforce 6100 + MCP51
+ *  - GIGABYTE GA-K8N51GMF-9: Socket 939 + Geforce 6100 + MCP51
  */
 static int nvidia_mcp_gpio3b_raise(void)
 {
@@ -1938,6 +1940,7 @@ const struct board_pciid_enable board_pciid_enables[] = {
 	{0x1106, 0x0686, 0x1106, 0x0686,  0x1106, 0x3058, 0x1458, 0xa000, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-7ZM",                512, OK, NULL},
 	{0x8086, 0x244b, 0x8086, 0x2442,  0x8086, 0x2445, 0x1458, 0xa002, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-8IRML",              0,   OK, intel_ich_gpio25_raise},
 	{0x8086, 0x24c3, 0x1458, 0x24c2,  0x8086, 0x24cd, 0x1458, 0x5004, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-8PE667 Ultra 2",     0,   OK, intel_ich_gpio32_raise},
+	{0x10DE, 0x02F1, 0x1458, 0x5000,  0x10DE, 0x0261, 0x1458, 0x5001, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-K8N51GMF",           0,   OK, nvidia_mcp_gpio3b_raise},
 	{0x10DE, 0x026C, 0x1458, 0xA102,  0x10DE, 0x0260, 0x1458, 0x5001, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-K8N51GMF-9",         0,   OK, nvidia_mcp_gpio3b_raise},
 	{0x10DE, 0x0050, 0x1458, 0x0C11,  0x10DE, 0x005e, 0x1458, 0x5000, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-K8N-SLI",            0,   OK, nvidia_mcp_gpio21_raise},
 	{0x1166, 0x0223, 0x103c, 0x320d,  0x14e4, 0x1678, 0x103c, 0x703e, NULL,          "hp",         "dl145_g3",    "HP",          "ProLiant DL145 G3",     0,   OK, board_hp_dl145_g3_enable},
diff --git a/print.c b/print.c
index 7ba2801..01a32c6 100644
--- a/print.c
+++ b/print.c
@@ -476,6 +476,7 @@ const struct board_info boards_known[] = {
 	B("GIGABYTE",	"GA-EP35-DS3L",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL),
 	B("GIGABYTE",	"GA-EX58-UD4P",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL),
 	B("GIGABYTE",	"GA-K8N-SLI",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL),
+	B("GIGABYTE",	"GA-K8N51GMF",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL),
 	B("GIGABYTE",	"GA-K8N51GMF-9",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=1939", NULL),
 	B("GIGABYTE",	"GA-M57SLI-S4",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2287", NULL),
 	B("GIGABYTE",	"GA-M61P-S3",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2434", NULL),
-- 
1.7.2.3