[flashrom] [PATCH] add SPI interface support for Tunnel Creek chipset

[Idwer Vollering]

2011/8/30 Feldschmid, Ingo <ifel at msc-ge.com>

> **
>
> The Intel Tunnel Creek chipset supports both an SPI and an LPC bus. Set
> chipset table entry for Tunnel Creek to new function “
> enable_flash_tunnelcreek”, which will read the hardware straps and return
> support for the bus that has been used for booting. This function uses “
> ich_init_spi” with ich_generation set to 7 for initializing the SPI bus if
> necessary.
>
> SPI functionality tested on actual hardware (see attached file flashrom.
> log), Tunnel Creek LPC interface not tested yet (missing hardware for th
> at).
>
The log you sent reports that flashrom found an untested chipset:

"Found chipset "Intel Atom E6xx(T)/Tunnel Creek" with PCI ID 8086:8186.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!"

Having tested this on hardware, can you change this:
{0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek",
enable_flash_tunnelcreek},

to: {0x8086, 0x8186, OK, "Intel", "Atom E6xx(T)/Tunnel Creek",
enable_flash_tunnelcreek},

recompile and send the output (and patch) after that change?

 Signed-off-by: Ingo Feldschmid <ifel at msc-ge.com>
>
> <<tunnelcreek.patch>> <<flashrom.log>>
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