[flashrom] MSI k9N6GM-V flashrom -V

Roman Fuks romanfuks at gmail.com
Sun Aug 14 05:38:42 CEST 2011


[root at Archlinux romanarch]# flashrom
flashrom v0.9.4-r1395 on Linux 3.0-ARCH (x86_64), built with libpci 
3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
sh: dmidecode: no se encontró la orden
dmidecode execution unsuccessful - continuing without DMI info
Found chipset "NVIDIA MCP61".
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet. 
Guesswork...
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support 
for your
chipset. Thanks.
OK.
This chipset supports the following protocols: LPC.
No EEPROM/flash device found.
Note: flashrom can never write if the flash chip isn't found automatically.
[root at Archlinux romanarch]# flashrom -V
flashrom v0.9.4-r1395 on Linux 3.0-ARCH (x86_64), built with libpci 
3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 870M loops per 
second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 1010 us, 10000 
myus = 10016 us, 4 myus = 5 us, OK.
Initializing internal programmer
No coreboot table found.
sh: dmidecode: no se encontró la orden
dmidecode execution unsuccessful - continuing without DMI info
Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet. 
Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0
Flash bus type is LPC
Found SMBus device 10de:03eb at 00:01:1
MCP SPI BAR is at 0xfec80000
Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI 
enabled.
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support 
for your
chipset. Thanks.
OK.
This chipset supports the following protocols: LPC.
Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xff, id2 
0xff, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 
0x06, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 
0xff, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xff, id2 
0x06, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xff, id2 
0x06, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xff, id2 
0xff, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xff, id2 
0xff, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing 
information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 
0xff, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, 
id1 parity violation, id1 is normal flash content, id2 is normal flash 
content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, 
id1 parity violation, id1 is normal flash content, id2 is normal flash 
content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, 
id1 parity violation, id1 is normal flash content, id2 is normal flash 
content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, 
id1 parity violation, id1 is normal flash content, id2 is normal flash 
content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, 
id1 parity violation, id1 is normal flash content, id2 is normal flash 
content
Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, 
id1 parity violation, id1 is normal flash content, id2 is normal flash 
content
Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xff, id2 
0xff, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xff, id2 
0xff, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xff, id2 
0xff, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2 
0xff, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xff, id2 
0x06, id1 parity violation, id1 is normal flash content, id2 is normal 
flash content
No EEPROM/flash device found.
Note: flashrom can never write if the flash chip isn't found automatically.
Restoring PCI config space for 00:01:0 reg 0x6d
Restoring PCI config space for 00:01:0 reg 0x90
Restoring PCI config space for 00:01:0 reg 0x8c
Restoring PCI config space for 00:01:0 reg 0x88





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