[flashrom] [PATCH 1/1] Mark Gigabyte GA-6ETXDR as UNSUPPORTED so far

Joshua Roys roysjosh at gmail.com
Wed Sep 15 11:10:33 CEST 2010


Hello,

Attached is a patch that might get your flash chip to appear- a
chipset enable was put into place, and some flash chips were added
that could have been used in your board.  It's possible but unlikely
that write would work, mostly due to the following:

On Tue, Sep 14, 2010 at 7:33 AM, Carl-Daniel Hailfinger
<c-d.hailfinger.devel.2006 at gmx.net> wrote:
> OK. The board has a "JP1 firmware write protect" jumper, so writing
> would probably be impossible without opening the case.
> It _is_ possible that this jumper also prevents probing, but I'm not so
> sure about that.

Apply the patch on the latest SVN.  Depending on when you try to
apply, it might need some changes.  (The diff was generated on r1171.)

Please let us know how it goes!

Josh
-------------- next part --------------
diff --git a/chipset_enable.c b/chipset_enable.c
index 4ac3a55..ac2edc2 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -802,6 +802,23 @@ static int enable_flash_ck804(struct pci_dev *dev, const char *name)
 	return 0;
 }
 
+static int enable_flash_osb4(struct pci_dev *dev, const char *name)
+{
+	uint8_t tmp;
+
+	buses_supported = CHIP_BUSTYPE_PARALLEL;
+
+	tmp = INB(0xc06);
+	tmp |= 0x1;
+	OUTB(tmp, 0xc06);
+
+	tmp = INB(0xc6f);
+	tmp |= 0x40;
+	OUTB(tmp, 0xc6f);
+
+	return 0;
+}
+
 /* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */
 static int enable_flash_sb400(struct pci_dev *dev, const char *name)
 {
@@ -1008,6 +1025,7 @@ const struct penable chipset_enables[] = {
 	{0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750", enable_flash_sb600},
 	{0x100b, 0x0510, NT, "AMD", "SC1100",		enable_flash_sc1100},
 	{0x1002, 0x4377, OK, "ATI", "SB400",		enable_flash_sb400},
+	{0x1166, 0x0200, OK, "Broadcom", "OSB4",	enable_flash_osb4},
 	{0x1166, 0x0205, OK, "Broadcom", "HT-1000",	enable_flash_ht1000},
 	{0x8086, 0x3b00, NT, "Intel", "3400 Desktop",	enable_flash_ich10},
 	{0x8086, 0x3b01, NT, "Intel", "3400 Mobile",	enable_flash_ich10},
diff --git a/flashchips.c b/flashchips.c
index 3ab19bb..961dd87 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -1962,6 +1962,32 @@ struct flashchip flashchips[] = {
 	},
 
 	{
+		.vendor		= "Bright",
+		.name		= "BM29F040",
+		.bustype	= CHIP_BUSTYPE_PARALLEL,
+		.manufacture_id	= BRIGHT_ID,
+		.model_id	= BRIGHT_BM29F040,
+		.total_size	= 512,
+		.page_size	= 64 * 1024,
+		.feature_bits	= FEATURE_EITHER_RESET,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_jedec,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {64 * 1024, 8} },
+				.block_erase = erase_sector_jedec,
+			}, {
+				.eraseblocks = { {512 * 1024, 1} },
+				.block_erase = erase_chip_block_jedec,
+			},
+		},
+		.write		= write_jedec_1,
+		.read		= read_memmapped,
+	},
+
+	{
 		.vendor		= "EMST",
 		.name		= "F49B002UA",
 		.bustype	= CHIP_BUSTYPE_PARALLEL,
@@ -3085,6 +3111,32 @@ struct flashchip flashchips[] = {
 	},
 
 	{
+		.vendor		= "Hyundai",
+		.name		= "HY29F040A",
+		.bustype	= CHIP_BUSTYPE_PARALLEL,
+		.manufacture_id	= HYUNDAI_ID,
+		.model_id	= HY_29F040A,
+		.total_size	= 512,
+		.page_size	= 64 * 1024,
+		.feature_bits	= FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_jedec,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {64 * 1024, 8} },
+				.block_erase = erase_sector_jedec,
+			}, {
+				.eraseblocks = { {512 * 1024, 1} },
+				.block_erase = erase_chip_block_jedec,
+			},
+		},
+		.write		= write_jedec_1,
+		.read		= read_memmapped,
+	},
+
+	{
 		.vendor		= "Intel",
 		.name		= "28F001BX-B",
 		.bustype	= CHIP_BUSTYPE_PARALLEL,
@@ -3883,6 +3935,32 @@ struct flashchip flashchips[] = {
 
 	{
 		.vendor		= "Macronix",
+		.name		= "MX29F040",
+		.bustype	= CHIP_BUSTYPE_PARALLEL,
+		.manufacture_id	= MX_ID,
+		.model_id	= MX_29F040,
+		.total_size	= 512,
+		.page_size	= 64 * 1024,
+		.feature_bits	= FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_jedec,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {64 * 1024, 8} },
+				.block_erase = erase_sector_jedec,
+			}, {
+				.eraseblocks = { {512 * 1024, 1} },
+				.block_erase = erase_chip_block_jedec,
+			},
+		},
+		.write		= write_jedec_1,
+		.read		= read_memapped,
+	},
+
+	{
+		.vendor		= "Macronix",
 		.name		= "MX29LV040",
 		.bustype	= CHIP_BUSTYPE_PARALLEL,
 		.manufacture_id	= MX_ID,
diff --git a/flashchips.h b/flashchips.h
index 2ca1163..77ff906 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -171,6 +171,10 @@
 #define AT_49F002N		0x07	/* for AT49F002(N)  */
 #define AT_49F002NT		0x08	/* for AT49F002(N)T */
 
+/* Bright Microelectronics == Hyundai */
+#define BRIGHT_ID		0xAD
+#define BRIGHT_BM29F040		0x40
+
 #define CATALYST_ID		0x31	/* Catalyst */
 
 #define EMST_ID			0x8C	/* EMST / EFST Elite Flash Storage */


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