[flashrom] [commit] r1161 - trunk

[repository service]

Author: mhm
Date: Mon Sep 13 21:39:25 2010
New Revision: 1161
URL: http://flashrom.org/trac/flashrom/changeset/1161

Log:
Add board enable for ASUS P4SC-E.

I does this by setting bits 3..2 of register 0x24 on the ITE IT8707F,
while keeping bit 3 of register 0x23 set while manipulating the first
register.

AFAIK, there is no public datasheet available for this super i/o chip, but
the above is how the vendor BIOS does it. Also, registers 0x23 and 0x24 seem
to have the same meaning as on the ITE IT8710F.

Matching on NB/SB.

Tested on a P4SC-E with SST 39SF020A flash. Probe, read, erase, write
all work.

lspci/superio output:
http://www.flashrom.org/pipermail/flashrom/2010-July/004090.html

flashrom output:
http://www.flashrom.org/pipermail/flashrom/2010-August/004566.html

Many thanks to Reinder de Haan for help with reverse engineering this!


Signed-off-by: Mattias Mattsson <vitplister at gmail.com>
Acked-by: Uwe Hermann <uwe at hermann-uwe.de>

Modified:
   trunk/board_enable.c
   trunk/print.c

Modified: trunk/board_enable.c
==============================================================================
--- trunk/board_enable.c	Mon Sep 13 20:22:36 2010	(r1160)
+++ trunk/board_enable.c	Mon Sep 13 21:39:25 2010	(r1161)
@@ -498,6 +498,48 @@
 	return ret;
 }
 
+/*
+ * The ITE IT8707F is a custom chip made by ITE exclusively for ASUS.
+ * It uses the Winbond command sequence to enter extended configuration
+ * mode and the ITE sequence to exit.
+ *
+ * Registers seems similar to the ones on ITE IT8710F.
+ */
+static int it8707f_write_enable(uint8_t port)
+{
+	uint8_t tmp;
+
+	w836xx_ext_enter(port);
+
+	/* Set bit 3 (GLB_REG_WE) of reg 0x23: Makes reg 0x24-0x2A rw */
+	tmp = sio_read(port, 0x23);
+	tmp |= (1 << 3);
+	sio_write(port, 0x23, tmp);
+
+	/* Set bit 2 (FLASH_WE) and bit 3 (FLASH_IF_EN) of reg 0x24 */
+	tmp = sio_read(port, 0x24);
+	tmp |= (1 << 2) | (1 << 3);
+	sio_write(port, 0x24, tmp);
+
+	/* Clear bit 3 (GLB_REG_WE) of reg 0x23: Makes reg 0x24-0x2A ro */
+	tmp = sio_read(port, 0x23);
+	tmp &= ~(1 << 3);
+	sio_write(port, 0x23, tmp);
+
+	exit_conf_mode_ite(port);
+
+	return 0;
+}
+
+/*
+ * Suited for:
+ *  - ASUS P4SC-E: SiS 651 + 962 + ITE IT8707F
+ */
+static int it8707f_write_enable_2e(void)
+{
+	return it8707f_write_enable(0x2e);
+}
+
 static int pc87360_gpio_set(uint8_t gpio, int raise)
 {
 	static const int bankbase[] = {0, 4, 8, 10, 12};
@@ -1818,6 +1860,7 @@
 	{0x8086, 0x24D3, 0x1043, 0x80A6,  0x8086, 0x2578, 0x1043, 0x80F6, NULL,          NULL,         NULL,          "ASUS",        "P4C800-E Deluxe",       0,   OK, intel_ich_gpio21_raise},
 	{0x8086, 0x2570, 0x1043, 0x80F2,  0x8086, 0x24D5, 0x1043, 0x80F3, NULL,          NULL,         NULL,          "ASUS",        "P4P800",                0,   NT, intel_ich_gpio21_raise},
 	{0x8086, 0x2570, 0x1043, 0x80F2,  0x105A, 0x3373, 0x1043, 0x80F5, NULL,          NULL,         NULL,          "ASUS",        "P4P800-E Deluxe",       0,   OK, intel_ich_gpio21_raise},
+	{0x1039, 0x0651, 0x1043, 0x8081,  0x1039, 0x0962,      0,      0, NULL,          NULL,         NULL,          "ASUS",        "P4SC-E",                0,   OK, it8707f_write_enable_2e},
 	{0x8086, 0x2570, 0x1043, 0x80A5,  0x105A, 0x24D3, 0x1043, 0x80A6, NULL,          NULL,         NULL,          "ASUS",        "P4SD-LA",               0,   NT, intel_ich_gpio32_raise},
 	{0x1039, 0x0661, 0x1043, 0x8113,  0x1039, 0x5513, 0x1043, 0x8087, NULL,          NULL,         NULL,          "ASUS",        "P4S800-MX",             512, OK, w836xx_memw_enable_2e},
 	{0x10B9, 0x1541,      0,      0,  0x10B9, 0x1533,      0,      0, "^P5A$",       "asus",       "p5a",         "ASUS",        "P5A",                   0,   OK, board_asus_p5a},

Modified: trunk/print.c
==============================================================================
--- trunk/print.c	Mon Sep 13 20:22:36 2010	(r1160)
+++ trunk/print.c	Mon Sep 13 21:39:25 2010	(r1161)
@@ -363,6 +363,7 @@
 	B("ASUS",	"P4C800-E Deluxe",	1, "http://www.asus.com/product.aspx?P_ID=cFuVCr9bXXCckmcK", NULL),
 	B("ASUS",	"P4P800",		1, "http://www.asus.com/product.aspx?P_ID=DYt1Et9MlBChqzLb", NULL),
 	B("ASUS",	"P4P800-E Deluxe",	1, "http://www.asus.com/product.aspx?P_ID=INIJUvLlif7LHp3g", NULL),
+	B("ASUS",	"P4SC-E",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS Terminator P4 533 barebone system"),
 	B("ASUS",	"P4SD-LA",		1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505", NULL),
 	B("ASUS",	"P4S800-MX",		1, "http://www.asus.com/product.aspx?P_ID=Bb57zoJhmO1Qkcrh", NULL),
 	B("ASUS",	"P5A",			1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL),