[flashrom] [RFC] Collecting chip data
Carl-Daniel Hailfinger
c-d.hailfinger.devel.2006 at gmx.net
Thu Oct 21 18:34:43 CEST 2010
As flashrom is moving towards more external programmer support, we need
more info about flash chips:
- voltage (incl. separate programming voltage if applicable)
- form factors
- 16-bit I/O capability for parallel flash, 2-bit/4-bit I/O for SPI
- pinouts for secondary interfaces (e.g. parallel AAI for LPC flash)
- locking
- write granularity (1bit, 1byte, 256byte, ...)
- implicit-erase-in-write?
- odd stuff like certain erase functions only working on a specific region
- supported command set (commands and what they do)
- are there multiple chips with same ID and differing command set
- stuff like non-working ID if the chip is still in AAI mode
- ID timing
- JEDEC toggle timing (if applicable)
- max. frequency for SPI chips (often differs among revisions)
- detailed timing for bitbanging parallel chips
- ...
Any other bits of info we could use?
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
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