[flashrom] [patch] EPoX EP-8NPA7I board enable (v2)

[Jonathan A. Kollasch]

Add board enable for EPoX EP-8NPA7I (and possibly other similar EPoX
boards).

Signed-off-by: Jonathan Kollasch <jakllsch at kollasch.net>
---
-------------- next part --------------
Index: board_enable.c
===================================================================
--- board_enable.c	(revision 1211)
+++ board_enable.c	(working copy)
@@ -947,6 +947,15 @@
 
 /*
  * Suited for:
+ *  - EPoX EP-8NPAI and related EPoX boards
+ */
+static int nvidia_mcp_gpio4_raise(void)
+{
+	return nvidia_mcp_gpio_set(0x04, 1);
+}
+
+/*
+ * Suited for:
  *  - HP xw9400 (Tyan S2915-E OEM): Dual(!) NVIDIA MCP55
  *
  * Notes: a) There are two MCP55 chips, so also two SMBus bridges on that
@@ -1922,6 +1931,7 @@
 	{0x10de, 0x03ea, 0x1019, 0x2602,  0x10de, 0x03e0, 0x1019, 0x2602, NULL,          NULL,         NULL,          "Elitegroup",  "GeForce6100SM-M",       0,   OK, board_ecs_geforce6100sm_m},
 	{0x1106, 0x3038, 0x1019, 0x0996,  0x1106, 0x3177, 0x1019, 0x0996, NULL,          NULL,         NULL,          "Elitegroup",  "K7VTA3",                256, OK, NULL},
 	{0x1106, 0x3177, 0x1106, 0x3177,  0x1106, 0x3059, 0x1695, 0x3005, NULL,          NULL,         NULL,          "EPoX",        "EP-8K5A2",              0,   OK, w836xx_memw_enable_2e},
+	{0x10DE, 0x005E, 0x1695, 0x1010,  0x10DE, 0x0050, 0x1695, 0x1010, NULL,          NULL,         NULL,          "EPoX",        "EP-8NPAI",              0,   OK, nvidia_mcp_gpio4_raise},
 	{0x10EC, 0x8139, 0x1695, 0x9001,  0x11C1, 0x5811, 0x1695, 0x9015, NULL,          NULL,         NULL,          "EPoX",        "EP-8RDA3+",             0,   OK, nvidia_mcp_gpio31_raise},
 	{0x8086, 0x7110,      0,      0,  0x8086, 0x7190,      0,      0, NULL,          "epox",       "ep-bx3",      "EPoX",        "EP-BX3",                0,   NT, intel_piix4_gpo22_raise},
 	{0x8086, 0x2443, 0x8086, 0x2442,  0x8086, 0x1130, 0x8086, 0x1130, "^6IEM ",      NULL,         NULL,          "GIGABYTE",    "GA-6IEM",               0,   NT, intel_ich_gpio25_raise},