[flashrom] [PATCH] Wait for SPI WRSR

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Mon Oct 4 14:58:51 CEST 2010


Bugfix, 0.9.3 candidate.

SPI write status register (WRSR) may take longer than 100 ms, and it
makes sense to poll for completion in 10 ms steps.
This patch complements r1115.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-wrsr_delay/spi25.c
===================================================================
--- flashrom-wrsr_delay/spi25.c	(Revision 1184)
+++ flashrom-wrsr_delay/spi25.c	(Arbeitskopie)
@@ -880,8 +880,14 @@
 		msg_cerr("%s failed during command execution\n",
 			__func__);
 	}
-	/* WRSR performs a self-timed erase before the changes take effect. */
+	/* WRSR performs a self-timed erase before the changes take effect.
+	 * This may take 50-85 ms in most cases, and some chips apparently
+	 * allow running RDSR only once. Pick an initial delay of 100 ms,
+	 * then wait in 10 ms steps.
+	 */
 	programmer_delay(100 * 1000);
+	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+		programmer_delay(10 * 1000);
 	return result;
 }
 
@@ -912,8 +918,14 @@
 		msg_cerr("%s failed during command execution\n",
 			__func__);
 	}
-	/* WRSR performs a self-timed erase before the changes take effect. */
+	/* WRSR performs a self-timed erase before the changes take effect.
+	 * This may take 50-85 ms in most cases, and some chips apparently
+	 * allow running RDSR only once. Pick an initial delay of 100 ms,
+	 * then wait in 10 ms steps.
+	 */
 	programmer_delay(100 * 1000);
+	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+		programmer_delay(10 * 1000);
 	return result;
 }
 


-- 
http://www.hailfinger.org/





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