[flashrom] Autodetect ITE IT87* LPC->SPI translation

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Tue Mar 23 20:19:02 CET 2010


Autodetect ITE IT87* LPC->SPI translation on all boards without the need
for a board enable.
Move boards which had an IT87* SPI board enable from the board enable
list to the OK list.

Verbose logs appreciated.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-it87_autodetect/flashrom.8
===================================================================
--- flashrom-it87_autodetect/flashrom.8	(Revision 972)
+++ flashrom-it87_autodetect/flashrom.8	(Arbeitskopie)
@@ -220,6 +220,15 @@
 enable is going to fail. In any case (success or failure), please report to
 the flashrom mailing list, see below.
 .sp
+If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
+translation, flashrom should autodetect that configuration. You can use
+.B "flashrom -p internal:it87spiport=portnum"
+syntax as explained in the
+.B it87spi
+programmer section to use a non-default port for controlling the IT87 series
+Super I/O. In the unlikely case flashrom doesn't detect an active IT87 LPC<->SPI
+bridge, you can try to force recognition by using the it87spi programmer.
+.TP
 .BR "dummy " programmer
 An optional parameter specifies the bus types it
 should support. For that you have to use the
@@ -233,7 +242,7 @@
 Example:
 .B "flashrom -p dummy:lpc,fwh"
 .TP
-.BR "nic3com" , " gfxnvidia" , " satasii" and " atahpt " programmers
+.BR "nic3com" , " gfxnvidia" , " satasii " and " atahpt " programmers
 These programmers have an option to specify the PCI address of the card
 your want to use, which must be specified if more than one card supported
 by the selected programmer is installed in your system. The syntax is
@@ -255,7 +264,7 @@
 An optional parameter sets the I/O base port of the IT87* SPI controller
 interface to the port specified in the parameter instead of using the port
 address set by the BIOS. For that you have to use the
-.B "flashrom -p it87spi:port=portnum"
+.B "flashrom -p it87spi:it87spiport=portnum"
 syntax where
 .B portnum
 is an I/O port number which must be a multiple of 8.
Index: flashrom-it87_autodetect/it87spi.c
===================================================================
--- flashrom-it87_autodetect/it87spi.c	(Revision 972)
+++ flashrom-it87_autodetect/it87spi.c	(Arbeitskopie)
@@ -106,6 +106,14 @@
 		enter_conf_mode_ite(port);
 		/* NOLDN, reg 0x24, mask out lowest bit (suspend) */
 		tmp = sio_read(port, 0x24) & 0xFE;
+		/* If IT87SPI was not explicitly selected, we want to check
+		 * quickly if LPC->SPI translation is active.
+		 */
+		if ((programmer == PROGRAMMER_INTERNAL) && !(tmp & (0x0E))) {
+			msg_pdbg("No IT87* serial flash segment enabled.\n");
+			exit_conf_mode_ite(port);
+			break;
+		}
 		msg_pdbg("Serial flash segment 0x%08x-0x%08x %sabled\n",
 		       0xFFFE0000, 0xFFFFFFFF, (tmp & 1 << 1) ? "en" : "dis");
 		msg_pdbg("Serial flash segment 0x%08x-0x%08x %sabled\n",
@@ -135,12 +143,17 @@
 			free(programmer_param);
 			programmer_param = NULL;
 		}
-		if (programmer_param && (portpos = strstr(programmer_param, "port="))) {
-			portpos += 5;
-			flashport = strtol(portpos, (char **)NULL, 0);
-			msg_pinfo("Forcing serial flash port 0x%04x\n", flashport);
-			sio_write(port, 0x64, (flashport >> 8));
-			sio_write(port, 0x65, (flashport & 0xff));
+		if (programmer_param) {
+			portpos = extract_param(&programmer_param,
+						"it87spiport=", ",:");
+			if (portpos) {
+				flashport = strtol(portpos, (char **)NULL, 0);
+				msg_pinfo("Forcing serial flash port 0x%04x\n",
+					  flashport);
+				sio_write(port, 0x64, (flashport >> 8));
+				sio_write(port, 0x65, (flashport & 0xff));
+				free(portpos);
+			}
 		}
 		exit_conf_mode_ite(port);
 		break;
Index: flashrom-it87_autodetect/internal.c
===================================================================
--- flashrom-it87_autodetect/internal.c	(Revision 972)
+++ flashrom-it87_autodetect/internal.c	(Arbeitskopie)
@@ -173,6 +173,9 @@
 		       "will most likely fail.\n");
 	}
 
+	/* Probe for IT87* LPC->SPI translation unconditionally. */
+	it87xx_probe_spi_flash(NULL);
+
 	board_flash_enable(lb_vendor, lb_part);
 
 	/* Even if chipset init returns an error code, we don't want to abort.
Index: flashrom-it87_autodetect/print.c
===================================================================
--- flashrom-it87_autodetect/print.c	(Revision 972)
+++ flashrom-it87_autodetect/print.c	(Arbeitskopie)
@@ -295,16 +295,22 @@
 	{ "DFI",		"Blood-Iron P35 T2RL", },
 	{ "Elitegroup",		"K7S5A", },
 	{ "Elitegroup",		"P6VAP-A+", },
+	{ "GIGABYTE",		"GA-2761GXDK", },
 	{ "GIGABYTE",		"GA-6BXC", },
 	{ "GIGABYTE",		"GA-6BXDU", },
 	{ "GIGABYTE",		"GA-6ZMA", },
 	{ "GIGABYTE",		"GA-7ZM", },
 	{ "GIGABYTE",		"GA-EP35-DS3L", },
 	{ "GIGABYTE",		"GA-EX58-UD4P", },
+	{ "GIGABYTE",		"GA-M57SLI-S4", },
+	{ "GIGABYTE",		"GA-M61P-S3", },
 	{ "GIGABYTE",		"GA-MA69VM-S2", },
+	{ "GIGABYTE",		"GA-MA770T-UD3P", },
+	{ "GIGABYTE",		"GA-MA78G-DS3H", },
+	{ "GIGABYTE",		"GA-MA78GM-S2H", },
 	{ "GIGABYTE",		"GA-MA78GPM-DS2H", },
+	{ "GIGABYTE",		"GA-MA790FX-DQ6", },
 	{ "GIGABYTE",		"GA-MA790GP-DS4H", },
-	{ "GIGABYTE",		"GA-MA770T-UD3P", },
 	{ "Intel",		"EP80759", },
 	{ "Jetway",		"J7F4K1G5D-PB", },
 	{ "MSI",                "MS-6153", },
@@ -356,6 +362,7 @@
 	{ "VIA",		"EPIA-SP", },
 	{ "VIA",		"NAB74X0", },
 	{ "VIA",		"pc2500e", },
+	{ "VIA",		"PC3500G", },
 	{ "VIA",		"VB700X", },
 
 	{},
Index: flashrom-it87_autodetect/board_enable.c
===================================================================
--- flashrom-it87_autodetect/board_enable.c	(Revision 972)
+++ flashrom-it87_autodetect/board_enable.c	(Arbeitskopie)
@@ -1378,15 +1378,8 @@
 	{0x10EC, 0x8139, 0x1695, 0x9001,  0x11C1, 0x5811, 0x1695, 0x9015, NULL,          NULL,         NULL,          "EPoX",        "EP-8RDA3+",             0,   OK, nvidia_mcp_gpio31_raise},
 	{0x8086, 0x7110,      0,      0,  0x8086, 0x7190,      0,      0, NULL,          "epox",       "ep-bx3",      "EPoX",        "EP-BX3",                0,   OK, board_epox_ep_bx3},
 	{0x1106, 0x0686, 0x1106, 0x0686,  0x1106, 0x3058, 0x1458, 0xa000, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-7ZM",                512, OK, NULL},
-	{0x1039, 0x0761,      0,      0,  0x10EC, 0x8168,      0,      0, NULL,          "gigabyte",   "2761gxdk",    "GIGABYTE",    "GA-2761GXDK",           0,   OK, it87xx_probe_spi_flash},
 	{0x1106, 0x3227, 0x1458, 0x5001,  0x10ec, 0x8139, 0x1458, 0xe000, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-7VT600",             0,   OK, it8705f_write_enable_2e},
 	{0x10DE, 0x0050, 0x1458, 0x0C11,  0x10DE, 0x005e, 0x1458, 0x5000, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-K8N-SLI",            0,   OK, nvidia_mcp_gpio21_raise},
-	{0x10DE, 0x0360, 0x1458, 0x0C11,  0x10DE, 0x0369, 0x1458, 0x5001, NULL,          "gigabyte",   "m57sli",      "GIGABYTE",    "GA-M57SLI-S4",          0,   OK, it87xx_probe_spi_flash},
-	{0x10de, 0x03e0,      0,      0,  0x10DE, 0x03D0,      0,      0, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-M61P-S3",            0,   OK, it87xx_probe_spi_flash},
-	{0x1002, 0x7910, 0x1458, 0x5000,  0x1002, 0x438D, 0x1458, 0x5001, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-MA69VM-S2",          0,   OK, it87xx_probe_spi_flash},
-	{0x1002, 0x4398, 0x1458, 0x5004,  0x1002, 0x4391, 0x1458, 0xb000, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-MA78G-DS3H",         0,   OK, it87xx_probe_spi_flash},
-	{0x1002, 0x4398, 0x1458, 0x5004,  0x1002, 0x4391, 0x1458, 0xb002, "^GA-MA78GM-S2H$", NULL,         NULL,          "GIGABYTE",    "GA-MA78GM-S2H",         0,   OK, it87xx_probe_spi_flash},
-	{0x1002, 0x438d, 0x1458, 0x5001,  0x1002, 0x5956, 0x1002, 0x5956, NULL,          NULL,         NULL,          "GIGABYTE",    "GA-MA790FX-DQ6",        0,   OK, it87xx_probe_spi_flash},
 	{0x1166, 0x0223, 0x103c, 0x320d,  0x102b, 0x0522, 0x103c, 0x31fa, NULL,          "hp",         "dl145_g3",    "HP",          "DL145 G3",              0,   OK, board_hp_dl145_g3_enable},
 	{0x8086, 0x2415, 0x103c, 0x1249,  0x10b7, 0x9200, 0x103c, 0x1246, NULL,          NULL,         NULL,          "HP",          "Vectra VL400",          0,   OK, board_hp_vl400}, 
 	{0x8086, 0x1a30, 0x103c, 0x1a30,  0x8086, 0x2443, 0x103c, 0x2440, "^VL420$",     NULL,         NULL,          "HP",          "VL420 SFF",             0,   OK, intel_ich_gpio22_raise},
@@ -1414,7 +1407,6 @@
 	{0x1106, 0x3123, 0x1106, 0x3123,  0x1106, 0x3059, 0x1106, 0x4161, NULL,          NULL,         NULL,          "Termtek",     "TK-3370 (Rev:2.5B)",    0,   OK, w836xx_memw_enable_4e},
 	{0x1106, 0x3177, 0x1106, 0xAA01,  0x1106, 0x3123, 0x1106, 0xAA01, NULL,          NULL,         NULL,          "VIA",         "EPIA M/MII/...",        0,   OK, via_vt823x_gpio15_raise},
 	{0x1106, 0x0259, 0x1106, 0x3227,  0x1106, 0x3065, 0x1106, 0x3149, NULL,          NULL,         NULL,          "VIA",         "EPIA-N/NL",             0,   OK, via_vt823x_gpio9_raise},
-	{0x1106, 0x5337, 0x1458, 0xb003,  0x1106, 0x287e, 0x1106, 0x337e, NULL,          NULL,         NULL,          "VIA",         "PC3500G",               0,   OK, it87xx_probe_spi_flash},
 
 	{     0,      0,      0,      0,       0,      0,      0,      0, NULL,          NULL,         NULL,          NULL,          NULL,                    0,   NT, NULL}, /* end marker */
 };


-- 
http://www.hailfinger.org/





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