[flashrom] [commit] r946 - trunk

repository service svn at flashrom.org
Wed Mar 17 01:47:56 CET 2010


Author: hailfinger
Date: Wed Mar 17 01:47:56 2010
New Revision: 946
URL: http://flashrom.org/trac/coreboot/changeset/946

Log:
PCI device BARs of all types had only bits 1:0 cleared while reading the
address. That was correct for IO BARs, but failed to mask bit 3:2 for
MEM BARs, resulting in odd offsets for prefetchable MEM BARs and for
64-bit capable MEM BARs.
Mask the correct number of bits for all types of BARs and add some debug
printing about BAR type.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Uwe Hermann <uwe at hermann-uwe.de>

Modified:
   trunk/pcidev.c

Modified: trunk/pcidev.c
==============================================================================
--- trunk/pcidev.c	Wed Mar 17 01:05:59 2010	(r945)
+++ trunk/pcidev.c	Wed Mar 17 01:47:56 2010	(r946)
@@ -32,6 +32,7 @@
 			 struct pcidev_status *devs)
 {
 	int i;
+	/* FIXME: 64 bit memory BARs need a 64 bit addr. */
 	uint32_t addr;
 
 	for (i = 0; devs[i].device_name != NULL; i++) {
@@ -42,12 +43,27 @@
 		 * Don't use dev->base_addr[x] (as value for 'bar'), won't
 		 * work on older libpci.
 		 */
-		addr = pci_read_long(dev, bar) & ~0x03;
+		addr = pci_read_long(dev, bar);
 		
 		printf("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x).\n",
 		       devs[i].vendor_name, devs[i].device_name,
 		       dev->vendor_id, dev->device_id, dev->bus, dev->dev,
 		       dev->func);
+		msg_pdbg("Requested BAR is %s", (addr & 0x1) ? "IO" : "MEM");
+		if (addr & 0x1) {
+			/* Mask off IO space indicator and reserved bit. */
+			msg_pdbg("\n");
+			addr &= ~0x3;
+		} else {
+			msg_pdbg(", %sbit, %sprefetchable\n",
+				 ((addr & 0x6) == 0x0) ? "32" :
+				 (((addr & 0x6) == 0x4) ? "64" : "reserved"),
+				 (addr & 0x8) ? "" : "not ");
+			/* Mask off Mem space indicator, 32/64bit type indicator
+			 * and Prefetchable indicator.
+			 */
+			addr &= ~0xf;
+		}
 
 		if (devs[i].status == NT) {
 			printf("===\nThis PCI device is UNTESTED. Please "




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