[flashrom] [PATCH] Add preliminary support for AMIC chips with uniform 4kB sectors

Daniel Lenski dlenski at gmail.com
Sat Jul 24 23:22:49 CEST 2010

On Sat, 2010-07-24 at 10:16 +0200, Carl-Daniel Hailfinger wrote:
> General remark: Can you order the eraseblock definitions by eraseblock
> size (smallest one first)? This allows us to use a better reflashing
> granularity in the first write/erase attempt, and reserves bigger
> granularities for the case where smaller granularities fail.

Got it, done.

> I can't find the 52h SPI opcode in the datasheet.
> I can't find the 60h SPI opcode in the datasheet.
>  (etc.)

Changed these.  I found other versions of the datasheets that suggested
these were valid and had been inadvertently omitted... but I think I'm
probably erring on the wrong side of caution by doing that.

> Can you add a comment so it looks like this:
> 		.unlock		= NULL, /* Two-byte status reg */

Done.  I made a careless mistake, which is that only the 032 and Q032
chips have the two-byte status reg and more complex protection features.
The smaller-capacity ones can still use the standard
spi_disable_blockprotect unlock function.  I have corrected this in the

One other feature of the A25L032 and A25LQ032 chips which Flashrom may
want to be aware of: they have 64 bytes of one-time-programmable memory
on them.  Is reading/writing this outside the scope of Flashrom?  I
assume they'd be used for serial numbers or crypto keys... and it might
be misleading to assume Flashrom was completely backing up/restoring a
BIOS image if it can't read and write this OTP region.

Revised patch is attached, with revised description.

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