[flashrom] [PATCH 2/3] Move SB600 SPI initialization to sb600spi.c

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Sun Jul 18 17:08:35 CEST 2010


On 18.07.2010 16:19, Michael Karcher wrote:
> Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
> ---
>  chipset_enable.c |   79 ++---------------------------------------------------
>  flash.h          |    2 +-
>  sb600spi.c       |   77 +++++++++++++++++++++++++++++++++++++++++++++++++++-
>  3 files changed, 80 insertions(+), 78 deletions(-)
>
> diff --git a/chipset_enable.c b/chipset_enable.c
> index 7434d65..ad3b732 100644
> --- a/chipset_enable.c
> +++ b/chipset_enable.c
> @@ -683,10 +683,8 @@ static int enable_flash_amd8111(struct pci_dev *dev, const char *name)
>  
>  static int enable_flash_sb600(struct pci_dev *dev, const char *name)
>  {
> -	uint32_t tmp, prot;
> +	uint32_t prot;
>  	uint8_t reg;
> -	struct pci_dev *smbus_dev;
> -	int has_spi = 1;
>  
>  	/* Clear ROM protect 0-3. */
>  	for (reg = 0x50; reg < 0x60; reg += 4) {
> @@ -710,80 +708,9 @@ static int enable_flash_sb600(struct pci_dev *dev, const char *name)
>  				(prot & 0xfffffc00) + ((prot & 0x3ff) << 8));
>  	}
>  
> -	/* Read SPI_BaseAddr */
> -	tmp = pci_read_long(dev, 0xa0);
> -	tmp &= 0xffffffe0;	/* remove bits 4-0 (reserved) */
> -	msg_pdbg("SPI base address is at 0x%x\n", tmp);
> -
> -	/* If the BAR has address 0, it is unlikely SPI is used. */
> -	if (!tmp)
> -		has_spi = 0;
> -
> -	if (has_spi) {
> -		/* Physical memory has to be mapped at page (4k) boundaries. */
> -		sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000,
> -				       0x1000);
> -		/* The low bits of the SPI base address are used as offset into
> -		 * the mapped page.
> -		 */
> -		sb600_spibar += tmp & 0xfff;
> -
> -		tmp = pci_read_long(dev, 0xa0);
> -		msg_pdbg("AltSpiCSEnable=%i, SpiRomEnable=%i, "
> -			     "AbortEnable=%i\n", tmp & 0x1, (tmp & 0x2) >> 1,
> -			     (tmp & 0x4) >> 2);
> -		tmp = (pci_read_byte(dev, 0xba) & 0x4) >> 2;
> -		msg_pdbg("PrefetchEnSPIFromIMC=%i, ", tmp);
> -
> -		tmp = pci_read_byte(dev, 0xbb);
> -		msg_pdbg("PrefetchEnSPIFromHost=%i, SpiOpEnInLpcMode=%i\n",
> -			     tmp & 0x1, (tmp & 0x20) >> 5);
> -		tmp = mmio_readl(sb600_spibar);
> -		msg_pdbg("SpiArbEnable=%i, SpiAccessMacRomEn=%i, "
> -			     "SpiHostAccessRomEn=%i, ArbWaitCount=%i, "
> -			     "SpiBridgeDisable=%i, DropOneClkOnRd=%i\n",
> -			     (tmp >> 19) & 0x1, (tmp >> 22) & 0x1,
> -			     (tmp >> 23) & 0x1, (tmp >> 24) & 0x7,
> -			     (tmp >> 27) & 0x1, (tmp >> 28) & 0x1);
> -	}
> -
> -	/* Look for the SMBus device. */
> -	smbus_dev = pci_dev_find(0x1002, 0x4385);
> -
> -	if (has_spi && !smbus_dev) {
> -		msg_perr("ERROR: SMBus device not found. Not enabling SPI.\n");
> -		has_spi = 0;
> -	}
> -	if (has_spi) {
> -		/* Note about the bit tests below: If a bit is zero, the GPIO is SPI. */
> -		/* GPIO11/SPI_DO and GPIO12/SPI_DI status */
> -		reg = pci_read_byte(smbus_dev, 0xAB);
> -		reg &= 0xC0;
> -		msg_pdbg("GPIO11 used for %s\n", (reg & (1 << 6)) ? "GPIO" : "SPI_DO");
> -		msg_pdbg("GPIO12 used for %s\n", (reg & (1 << 7)) ? "GPIO" : "SPI_DI");
> -		if (reg != 0x00)
> -			has_spi = 0;
> -		/* GPIO31/SPI_HOLD and GPIO32/SPI_CS status */
> -		reg = pci_read_byte(smbus_dev, 0x83);
> -		reg &= 0xC0;
> -		msg_pdbg("GPIO31 used for %s\n", (reg & (1 << 6)) ? "GPIO" : "SPI_HOLD");
> -		msg_pdbg("GPIO32 used for %s\n", (reg & (1 << 7)) ? "GPIO" : "SPI_CS");
> -		/* SPI_HOLD is not used on all boards, filter it out. */
> -		if ((reg & 0x80) != 0x00)
> -			has_spi = 0;
> -		/* GPIO47/SPI_CLK status */
> -		reg = pci_read_byte(smbus_dev, 0xA7);
> -		reg &= 0x40;
> -		msg_pdbg("GPIO47 used for %s\n", (reg & (1 << 6)) ? "GPIO" : "SPI_CLK");
> -		if (reg != 0x00)
> -			has_spi = 0;
> -	}
> -
>  	buses_supported = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH;
> -	if (has_spi) {
> -		buses_supported |= CHIP_BUSTYPE_SPI;
> -		spi_controller = SPI_CONTROLLER_SB600;
> -	}
> +
> +	sb600_probe_spi(dev);
>   

sb600_spi_probe should return an error code which is checked.


>  
>  	/* Read ROM strap override register. */
>  	OUTB(0x8f, 0xcd6);
> diff --git a/flash.h b/flash.h
> index a8ca6d7..8ebea29 100644
> --- a/flash.h
> +++ b/flash.h
> @@ -702,11 +702,11 @@ int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int
>  int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
>  
>  /* sb600spi.c */
> +void sb600_probe_spi(struct pci_dev * dev);
>   

space after *


>  int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
>  		      const unsigned char *writearr, unsigned char *readarr);
>  int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
>  int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
> -extern uint8_t *sb600_spibar;
>  
>  /* wbsio_spi.c */
>  int wbsio_check_for_spi(void);
> diff --git a/sb600spi.c b/sb600spi.c
> index caf1a99..e42b20b 100644
> --- a/sb600spi.c
> +++ b/sb600spi.c
> @@ -40,7 +40,82 @@
>   *};
>   */
>  
> -uint8_t *sb600_spibar = NULL;
> +static uint8_t *sb600_spibar = NULL;
> +
> +void sb600_probe_spi(struct pci_dev * dev)
>   

please make it return int, and kill the space after *


> +{
> +	struct pci_dev *smbus_dev;
> +	uint32_t tmp;
> +	uint8_t reg;
> +	/* Read SPI_BaseAddr */
> +	tmp = pci_read_long(dev, 0xa0);
> +	tmp &= 0xffffffe0;	/* remove bits 4-0 (reserved) */
> +	msg_pdbg("SPI base address is at 0x%x\n", tmp);
> +
> +	/* If the BAR has address 0, it is unlikely SPI is used. */
> +	if (!tmp)
> +		return;
>   

that would be return 0


> +
> +	/* Physical memory has to be mapped at page (4k) boundaries. */
> +	sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000,
> +			       0x1000);
> +	/* The low bits of the SPI base address are used as offset into
> +	 * the mapped page.
> +	 */
> +	sb600_spibar += tmp & 0xfff;
> +
> +	tmp = pci_read_long(dev, 0xa0);
> +	msg_pdbg("AltSpiCSEnable=%i, SpiRomEnable=%i, "
> +		     "AbortEnable=%i\n", tmp & 0x1, (tmp & 0x2) >> 1,
> +		     (tmp & 0x4) >> 2);
> +	tmp = (pci_read_byte(dev, 0xba) & 0x4) >> 2;
> +	msg_pdbg("PrefetchEnSPIFromIMC=%i, ", tmp);
> +
> +	tmp = pci_read_byte(dev, 0xbb);
> +	msg_pdbg("PrefetchEnSPIFromHost=%i, SpiOpEnInLpcMode=%i\n",
> +		     tmp & 0x1, (tmp & 0x20) >> 5);
> +	tmp = mmio_readl(sb600_spibar);
> +	msg_pdbg("SpiArbEnable=%i, SpiAccessMacRomEn=%i, "
> +		     "SpiHostAccessRomEn=%i, ArbWaitCount=%i, "
> +		     "SpiBridgeDisable=%i, DropOneClkOnRd=%i\n",
> +		     (tmp >> 19) & 0x1, (tmp >> 22) & 0x1,
> +		     (tmp >> 23) & 0x1, (tmp >> 24) & 0x7,
> +		     (tmp >> 27) & 0x1, (tmp >> 28) & 0x1);
> +
> +	/* Look for the SMBus device. */
> +	smbus_dev = pci_dev_find(0x1002, 0x4385);
> +
> +	if (!smbus_dev) {
> +		msg_perr("ERROR: SMBus device not found. Not enabling SPI.\n");
> +		return;
>   

And this should be an error return. Do we want some define for
ERROR_NONFATAL and make it some otherwise unusued value? Maybe 0x100 or
something?


> +	}
> +
> +	/* Note about the bit tests below: If a bit is zero, the GPIO is SPI. */
> +	/* GPIO11/SPI_DO and GPIO12/SPI_DI status */
> +	reg = pci_read_byte(smbus_dev, 0xAB);
> +	reg &= 0xC0;
> +	msg_pdbg("GPIO11 used for %s\n", (reg & (1 << 6)) ? "GPIO" : "SPI_DO");
> +	msg_pdbg("GPIO12 used for %s\n", (reg & (1 << 7)) ? "GPIO" : "SPI_DI");
> +	if (reg != 0x00)
> +		return;
>   

Not an error, just a sign that SPI is not used.
return 0;


> +	/* GPIO31/SPI_HOLD and GPIO32/SPI_CS status */
> +	reg = pci_read_byte(smbus_dev, 0x83);
> +	reg &= 0xC0;
> +	msg_pdbg("GPIO31 used for %s\n", (reg & (1 << 6)) ? "GPIO" : "SPI_HOLD");
> +	msg_pdbg("GPIO32 used for %s\n", (reg & (1 << 7)) ? "GPIO" : "SPI_CS");
> +	/* SPI_HOLD is not used on all boards, filter it out. */
> +	if ((reg & 0x80) != 0x00)
> +		return;
>   

return 0;


> +	/* GPIO47/SPI_CLK status */
> +	reg = pci_read_byte(smbus_dev, 0xA7);
> +	reg &= 0x40;
> +	msg_pdbg("GPIO47 used for %s\n", (reg & (1 << 6)) ? "GPIO" : "SPI_CLK");
> +	if (reg != 0x00)
> +		return;
>   

return 0;


> +
> +	buses_supported |= CHIP_BUSTYPE_SPI;
> +	spi_controller = SPI_CONTROLLER_SB600;
> +}
>  
>  int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
>  {
>   

Looks good otherwise.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/





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