[flashrom] [PATCH] SPI bitbanging core fixups

Michael Karcher flashrom at mkarcher.dialup.fu-berlin.de
Sat Jul 17 12:46:52 CEST 2010

Am Samstag, den 17.07.2010, 12:31 +0200 schrieb Carl-Daniel Hailfinger:
> > My idea was that everything that is not "broken" in hardware doesn't
> > need a delay, so 0 is a sane default and programmers can set this to a
> > bigger value in their code if they think that this programmer is so
> > slow, but I don't really care, 1 as default is OK too.
> I based the delay requirement on the possibility of really fast
> hardware. Once your hardware can do bitbanging at speeds above 16 MHz,
> it is too fast for some SPI chips.
I don't see any uncached Bus in PC environment reaching 16MHz anytime
soon (i.e. 32 megacycles per second). That's why I expected the code to
be always slow enough.

> Please undo that hunk. It breaks a few semi-supported SPI chips with odd
> sector sizes and is inconsistent with how the other SPI drivers do it.
OK, undone,

and committed as r1084.

  Michael Karcher

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