[flashrom] [PATCH] SPI bitbanging core fixups
flashrom at mkarcher.dialup.fu-berlin.de
Sat Jul 17 09:47:00 CEST 2010
Am Samstag, den 17.07.2010, 00:59 +0200 schrieb Carl-Daniel Hailfinger:
> > Why so slow? SPI was designed to be fast (if you want a slow system, use
> > I2C instead ;) ). It might be quite sensible on programmers at the
> > parallel port having some cable length and no driver chip at the flash
> > piece (maybe that applies to SPIPGM), but that is specific to this
> > programmer. nVidia on-board stuff should run slow enough without any
> > programmer_delay calls.
> Not sure. I figured that 1 usec would be a sane default, and could be
> reduced to zero by individual programmers depending on their knowledge
> about timing.
My idea was that everything that is not "broken" in hardware doesn't
need a delay, so 0 is a sane default and programmers can set this to a
bigger value in their code if they think that this programmer is so
slow, but I don't really care, 1 as default is OK too.
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
I'd rather kill the whole buffer stuff (see attached patch) before
applying your patch (and of course remove the buffer stuff from your
patch, too). No other reason not to ack.
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