[flashrom] S2915, flashrom , linux failure

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Wed Jan 20 18:43:30 CET 2010

Hi Phil,
hi Alessandro,

you both have the same problem.

can you retry with latest flashrom from svn? While it might not work
either, it will give us better insights into what's wrong with your system.

One idea would be to run

flashrom -V -c SST49LF080A

directly after a cold boot (no other flashrom runs before, make sure it
is really a cold boot). Please also run
superiotool -deV
(latest superiotool from svn) after that.

Just to rule out any other strangeness, can you both tell me about how
much RAM the machine has, the OS/distribution and kernel version with
which you tested flashrom? You can get the kernel version with
uname -a

On 20.01.2010 18:03, i15 at ornl.gov wrote:
> Some addtional info. when I force the tool to read using the chip name ,
> it will dump the flash (though warning it may be garbage) and some
> string comparison with the "original V101.ROM shows it is at least not
> random.

Yes, that's expected.

>> sapienza:~/Bios #  ./flashrom -V -f -c SST49LF080A -r dump.bin
>> flashrom v0.9.1-r710
>> No coreboot table found.
>> Found chipset "NVIDIA MCP55", enabling flash write... OK.
>> This chipset supports the following protocols: Non-SPI.
>> Calibrating delay loop... 648M loops per second, 100 myus = 191 us. OK.
>> Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing
>> information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff,
>> id1 parity violation, id1 is normal flash content, id2 is normal flash
>> content
>> No EEPROM/flash device found.

I really hope we can solve this mystery. Hm. Could be a screwed up MTRR
setting, or we hit a bug in libpci, or there is a new bug in the MCP55
code (which is rather unlikely because it works for others).


Developer quote of the year:
"We are juggling too many chainsaws and flaming arrows and tigers."

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