[flashrom] [PATCH] Check if an erase is needed to write

[David Hendricks]

Looks good to me. Is there any reason not to ACK this? It seems like a
useful optimization, at least.

I think there may have been a small misunderstanding with the snippet
Carl-Daniel posted earlier. The note about usage model at the end of the
section might help alleviate fears of doing multiple writes without doing an
erase operation first. Here is the full section from the ICH7 datasheet from
April '07:

*5.25.4.3 Multiple Page Write Usage Model*
*         The system BIOS and Intel® Active Management Technology firmware
usage models*
*         require that the serial flash device support multiple writes
(minimum of 512 writes) to*
*         a page (256 bytes) without requiring a preceding erase command.
BIOS commonly*
*         uses capabilities such as counters that are typically implemented
by using byte writes*
*         to ‘increment’ the bits within a page that have been designated as
the counter. The*
*         Intel AMT firmware usage model requires the capability for
multiple data updates within*
*         any given page. These data updates occur via byte writes without
executing a*
*         preceding erase to the given page. Both the BIOS and Intel AMT
firmware multiple*
*         page write usage models apply to sequential and non-sequential
data writes.*
*Note:    This usage model requirement is based on any given bit only being
written once from a*
*         ‘1’ to a ‘0’ without requiring the preceding erase. An erase would
be required to change*
*         bits back to the ‘1’ state.*


On Thu, Feb 11, 2010 at 6:31 AM, Carl-Daniel Hailfinger <
c-d.hailfinger.devel.2006 at gmx.net> wrote:

> This patch is 5 months old and it would be awesome if someone could
> review it.
> We need this if we ever want to support partial writes.
>
> On 22.12.2009 02:38, Carl-Daniel Hailfinger wrote:
> > On 23.11.2009 15:33, Carl-Daniel Hailfinger wrote:
> >
> >> On 19.11.2009 17:51, Carl-Daniel Hailfinger wrote:
> >>
> >>
> >>> To summarize: Write granularity is chip specific. The following write
> >>> granularities exist according to my datasheet survey:
> >>> - 1 bit. Each bit can be cleared individually.
> >>> - 1 byte. A byte can be written once. Further writes to an already
> >>> written byte cause the contents to be either undefined or to stay
> unchanged.
> >>> - 128 bytes. If less than 128 bytes are written, the rest will be
> >>> erased. Each write to a 128-byte region will trigger an automatic erase
> >>> before anything is written. Very uncommon behaviour.
> >>> - 256 bytes. If less than 256 bytes are written, the contents of the
> >>> unwritten bytes are undefined.
> >>>
> >>>
> >> New patch. Handle 1-bit, 1-byte and 256-byte write granularity.
> >>
> >> Signed-off-by: Carl-Daniel Hailfinger <
> c-d.hailfinger.devel.2006 at gmx.net>
> >>
> >>
> >
> > Ping?
> > This is http://patchwork.coreboot.org/patch/582/ in case you want to
> > look at the patch again.
> >
>
> Regards,
> Carl-Daniel
>
> --
> Developer quote of the year:
> "We are juggling too many chainsaws and flaming arrows and tigers."
>
>
> _______________________________________________
> flashrom mailing list
> flashrom at flashrom.org
> http://www.flashrom.org/mailman/listinfo/flashrom
>



-- 
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20100226/dbce64bd/attachment.html>