[flashrom] MCP SPI dump
c-d.hailfinger.devel.2006 at gmx.net
Thu Feb 18 16:17:36 CET 2010
On 18.02.2010 15:08, Ivo Anjo wrote:
> Attached is output with rev 906 for the MCP78S board.
> No problem at all. I think flashrom is a great app, so if I can help, I'm
> glad to.
Thanks, it is indeed very helpful to have that output.
> flashrom v0.9.1-r906
> No coreboot table found.
> DMI string 0: "System manufacturer"
> DMI string 1: "System Product Name"
> DMI string 2: "System Version"
> DMI string 3: "ASUSTeK Computer INC."
> DMI string 4: "M3N78-EM"
> DMI string 5: "Rev X.0x"
> Found ITE SuperI/O, id 8712
> Found chipset "NVIDIA MCP78S", enabling flash write...
> This chipset is not really supported yet. Guesswork...
> ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0
> Guessed flash bus type is SPI
> Found SMBus device 10de:0752 at 00:01:1
> SPI BAR is at 0xfcf80000, after clearing low bits BAR is at 0xfcf80000
> Mapping MCP67 SPI at 0xfcf80000, unaligned size 0x544.
> SPI control is 0xc01a, enable=0, idle=0
> SPI on this chipset is not supported yet.
> This chipset supports the following protocols: None.
> Calibrating delay loop... 893M loops per second, 100 myus = 203 us. OK.
> Probing for AMD Am29F010A/B, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Works exactly as intended. Great news.
"I do consider assignment statements and pointer variables to be among
computer science's most valuable treasures."
-- Donald E. Knuth
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