[flashrom] [PATCH] Lock printing for AMIC A25* and Atmel AT25*
Carl-Daniel Hailfinger
c-d.hailfinger.devel.2006 at gmx.net
Sun Dec 5 18:51:27 CET 2010
Add lock printing for AMIC A25L05PT, A25L05PU, A25L10PT, A25L10PU,
A25L20PT, A25L20PU, A25L40PT, A25L40PU, A25L80P, A25L16PT, A25L16PU,
A25L512, A25L010, A25L020, A25L040, A25L080, A25L016, A25L032, A25LQ032.
Add lock printing for Atmel AT26DF081A, AT26DF161, AT26DF161A, AT26DF321.
Move Atmel AT25*/AT26* lock related functions from spi25.c to at25.c.
That code was originally committed in r1115, but chip specific functions
shouldn't live in the generic spi25.c.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Index: flashrom-spi_prettyprint_statusreg_a25_at25/a25.c
===================================================================
--- flashrom-spi_prettyprint_statusreg_a25_at25/a25.c (Revision 0)
+++ flashrom-spi_prettyprint_statusreg_a25_at25/a25.c (Revision 0)
@@ -0,0 +1,103 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2010 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "flash.h"
+#include "chipdrivers.h"
+#include "spi.h"
+
+/* Prettyprint the status register. Works for AMIC A25L series. */
+
+int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ msg_cdbg("Chip status register: Status Register Write Disable "
+ "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+ spi_prettyprint_status_register_bit(status, 6);
+ spi_prettyprint_status_register_bit(status, 5);
+ spi_prettyprint_status_register_bit(status, 4);
+ spi_prettyprint_status_register_bp3210(status, 1);
+ spi_prettyprint_status_register_welwip(status);
+ return 0;
+}
+
+int spi_prettyprint_status_register_amic_a25l40p(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ msg_cdbg("Chip status register: Status Register Write Disable "
+ "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+ spi_prettyprint_status_register_bit(status, 6);
+ spi_prettyprint_status_register_bit(status, 5);
+ spi_prettyprint_status_register_bp3210(status, 2);
+ spi_prettyprint_status_register_welwip(status);
+ return 0;
+}
+
+int spi_prettyprint_status_register_amic_a25l032(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ msg_cdbg("Chip status register: Status Register Write Disable "
+ "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+ msg_cdbg("Chip status register: Sector Protect Size (SEC) "
+ "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
+ msg_cdbg("Chip status register: Top/Bottom (TB) "
+ "is %s\n", (status & (1 << 5)) ? "bottom" : "top");
+ spi_prettyprint_status_register_bp3210(status, 2);
+ spi_prettyprint_status_register_welwip(status);
+ msg_cdbg("Chip status register 2 is NOT decoded!\n");
+ return 0;
+}
+
+int spi_prettyprint_status_register_amic_a25lq032(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ msg_cdbg("Chip status register: Status Register Write Disable "
+ "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+ msg_cdbg("Chip status register: Sector Protect Size (SEC) "
+ "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
+ msg_cdbg("Chip status register: Top/Bottom (TB) "
+ "is %s\n", (status & (1 << 5)) ? "bottom" : "top");
+ spi_prettyprint_status_register_bp3210(status, 2);
+ spi_prettyprint_status_register_welwip(status);
+ msg_cdbg("Chip status register 2 is NOT decoded!\n");
+ return 0;
+}
+
+/* FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
+ * spi_prettyprint_status_register_amic_a25l05p or
+ * spi_prettyprint_status_register_amic_a25l40p.
+ * FIXME: spi_disable_blockprotect is incorrect and will fail randomly for chips
+ * using spi_prettyprint_status_register_amic_a25l032 or
+ * spi_prettyprint_status_register_amic_a25lq032.
+ */
Index: flashrom-spi_prettyprint_statusreg_a25_at25/Makefile
===================================================================
--- flashrom-spi_prettyprint_statusreg_a25_at25/Makefile (Revision 1245)
+++ flashrom-spi_prettyprint_statusreg_a25_at25/Makefile (Arbeitskopie)
@@ -84,7 +84,8 @@
CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \
sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \
- sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o sharplhf00l04.o
+ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o sharplhf00l04.o \
+ a25.o at25.o
LIB_OBJS = layout.o
Index: flashrom-spi_prettyprint_statusreg_a25_at25/at25.c
===================================================================
--- flashrom-spi_prettyprint_statusreg_a25_at25/at25.c (Revision 0)
+++ flashrom-spi_prettyprint_statusreg_a25_at25/at25.c (Revision 0)
@@ -0,0 +1,287 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2010 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "flash.h"
+#include "chipdrivers.h"
+#include "spi.h"
+
+/* Prettyprint the status register. Works for Atmel A25/A26 series. */
+
+static void spi_prettyprint_status_register_atmel_at25_srpl(uint8_t status)
+{
+ msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) "
+ "is %sset\n", (status & (1 << 7)) ? "" : "not ");
+}
+
+static void spi_prettyprint_status_register_atmel_at25_epewpp(uint8_t status)
+{
+ msg_cdbg("Chip status register: Erase/Program Error (EPE) "
+ "is %sset\n", (status & (1 << 5)) ? "" : "not ");
+ msg_cdbg("Chip status register: WP# pin (WPP) "
+ "is %sasserted\n", (status & (1 << 4)) ? "not " : "");
+}
+
+static void spi_prettyprint_status_register_atmel_at25_swp(uint8_t status)
+{
+ msg_cdbg("Chip status register: Software Protection Status (SWP): ");
+ switch (status & (3 << 2)) {
+ case 0x0 << 2:
+ msg_cdbg("no sectors are protected\n");
+ break;
+ case 0x1 << 2:
+ msg_cdbg("some sectors are protected\n");
+ /* FIXME: Read individual Sector Protection Registers. */
+ break;
+ case 0x3 << 2:
+ msg_cdbg("all sectors are protected\n");
+ break;
+ default:
+ msg_cdbg("reserved for future use\n");
+ break;
+ }
+}
+
+int spi_prettyprint_status_register_at25df(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ spi_prettyprint_status_register_atmel_at25_srpl(status);
+ spi_prettyprint_status_register_bit(status, 6);
+ spi_prettyprint_status_register_atmel_at25_epewpp(status);
+ spi_prettyprint_status_register_atmel_at25_swp(status);
+ spi_prettyprint_status_register_welwip(status);
+ return 0;
+}
+
+int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash)
+{
+ /* FIXME: We should check the security lockdown. */
+ msg_cdbg("Ignoring security lockdown (if present)\n");
+ msg_cdbg("Ignoring status register byte 2\n");
+ return spi_prettyprint_status_register_at25df(flash);
+}
+
+int spi_prettyprint_status_register_at25f(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ spi_prettyprint_status_register_atmel_at25_srpl(status);
+ spi_prettyprint_status_register_bit(status, 6);
+ spi_prettyprint_status_register_atmel_at25_epewpp(status);
+ spi_prettyprint_status_register_bit(status, 3);
+ msg_cdbg("Chip status register: Block Protect 0 (BP0) is "
+ "%sset, %s sectors are protected\n",
+ (status & (1 << 2)) ? "" : "not ",
+ (status & (1 << 2)) ? "all" : "no");
+ spi_prettyprint_status_register_welwip(status);
+ return 0;
+}
+
+int spi_prettyprint_status_register_at25fs010(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
+ "is %sset\n", (status & (1 << 7)) ? "" : "not ");
+ msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
+ "%sset\n", (status & (1 << 6)) ? "" : "not ");
+ msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
+ "%sset\n", (status & (1 << 5)) ? "" : "not ");
+ msg_cdbg("Chip status register: Bit 4 is "
+ "%sset\n", (status & (1 << 4)) ? "" : "not ");
+ msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
+ "%sset\n", (status & (1 << 3)) ? "" : "not ");
+ msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
+ "%sset\n", (status & (1 << 2)) ? "" : "not ");
+ /* FIXME: Pretty-print detailed sector protection status. */
+ spi_prettyprint_status_register_welwip(status);
+ return 0;
+}
+
+int spi_prettyprint_status_register_at25fs040(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
+ "is %sset\n", (status & (1 << 7)) ? "" : "not ");
+ msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
+ "%sset\n", (status & (1 << 6)) ? "" : "not ");
+ msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
+ "%sset\n", (status & (1 << 5)) ? "" : "not ");
+ msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is "
+ "%sset\n", (status & (1 << 4)) ? "" : "not ");
+ msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
+ "%sset\n", (status & (1 << 3)) ? "" : "not ");
+ msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
+ "%sset\n", (status & (1 << 2)) ? "" : "not ");
+ /* FIXME: Pretty-print detailed sector protection status. */
+ spi_prettyprint_status_register_welwip(status);
+ return 0;
+}
+
+int spi_prettyprint_status_register_atmel_at26df081a(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ spi_prettyprint_status_register_atmel_at25_srpl(status);
+ msg_cdbg("Chip status register: Sequential Program Mode Status (SPM) "
+ "is %sset\n", (status & (1 << 6)) ? "" : "not ");
+ spi_prettyprint_status_register_atmel_at25_epewpp(status);
+ spi_prettyprint_status_register_atmel_at25_swp(status);
+ spi_prettyprint_status_register_welwip(status);
+ return 0;
+}
+
+int spi_disable_blockprotect_at25df(struct flashchip *flash)
+{
+ uint8_t status;
+ int result;
+
+ status = spi_read_status_register();
+ /* If block protection is disabled, stop here. */
+ if ((status & (3 << 2)) == 0)
+ return 0;
+
+ msg_cdbg("Some block protection in effect, disabling\n");
+ if (status & (1 << 7)) {
+ msg_cdbg("Need to disable Sector Protection Register Lock\n");
+ if ((status & (1 << 4)) == 0) {
+ msg_cerr("WP# pin is active, disabling "
+ "write protection is impossible.\n");
+ return 1;
+ }
+ /* All bits except bit 7 (SPRL) are readonly. */
+ result = spi_write_status_register(flash, status & ~(1 << 7));
+ if (result) {
+ msg_cerr("spi_write_status_register failed\n");
+ return result;
+ }
+
+ }
+ /* Global unprotect. Make sure to mask SPRL as well. */
+ result = spi_write_status_register(flash, status & ~0xbc);
+ if (result) {
+ msg_cerr("spi_write_status_register failed\n");
+ return result;
+ }
+ status = spi_read_status_register();
+ if ((status & (3 << 2)) != 0) {
+ msg_cerr("Block protection could not be disabled!\n");
+ return 1;
+ }
+ return 0;
+}
+
+int spi_disable_blockprotect_at25df_sec(struct flashchip *flash)
+{
+ /* FIXME: We should check the security lockdown. */
+ msg_cinfo("Ignoring security lockdown (if present)\n");
+ return spi_disable_blockprotect_at25df(flash);
+}
+
+int spi_disable_blockprotect_at25f(struct flashchip *flash)
+{
+ /* spi_disable_blockprotect_at25df is not really the right way to do
+ * this, but the side effects of said function work here as well.
+ */
+ return spi_disable_blockprotect_at25df(flash);
+}
+
+int spi_disable_blockprotect_at25fs010(struct flashchip *flash)
+{
+ uint8_t status;
+ int result;
+
+ status = spi_read_status_register();
+ /* If block protection is disabled, stop here. */
+ if ((status & 0x6c) == 0)
+ return 0;
+
+ msg_cdbg("Some block protection in effect, disabling\n");
+ if (status & (1 << 7)) {
+ msg_cdbg("Need to disable Status Register Write Protect\n");
+ /* Clear bit 7 (WPEN). */
+ result = spi_write_status_register(flash, status & ~(1 << 7));
+ if (result) {
+ msg_cerr("spi_write_status_register failed\n");
+ return result;
+ }
+ }
+ /* Global unprotect. Make sure to mask WPEN as well. */
+ result = spi_write_status_register(flash, status & ~0xec);
+ if (result) {
+ msg_cerr("spi_write_status_register failed\n");
+ return result;
+ }
+ status = spi_read_status_register();
+ if ((status & 0x6c) != 0) {
+ msg_cerr("Block protection could not be disabled!\n");
+ return 1;
+ }
+ return 0;
+}
+
+int spi_disable_blockprotect_at25fs040(struct flashchip *flash)
+{
+ uint8_t status;
+ int result;
+
+ status = spi_read_status_register();
+ /* If block protection is disabled, stop here. */
+ if ((status & 0x7c) == 0)
+ return 0;
+
+ msg_cdbg("Some block protection in effect, disabling\n");
+ if (status & (1 << 7)) {
+ msg_cdbg("Need to disable Status Register Write Protect\n");
+ /* Clear bit 7 (WPEN). */
+ result = spi_write_status_register(flash, status & ~(1 << 7));
+ if (result) {
+ msg_cerr("spi_write_status_register failed\n");
+ return result;
+ }
+ }
+ /* Global unprotect. Make sure to mask WPEN as well. */
+ result = spi_write_status_register(flash, status & ~0xfc);
+ if (result) {
+ msg_cerr("spi_write_status_register failed\n");
+ return result;
+ }
+ status = spi_read_status_register();
+ if ((status & 0x7c) != 0) {
+ msg_cerr("Block protection could not be disabled!\n");
+ return 1;
+ }
+ return 0;
+}
Index: flashrom-spi_prettyprint_statusreg_a25_at25/spi25.c
===================================================================
--- flashrom-spi_prettyprint_statusreg_a25_at25/spi25.c (Revision 1245)
+++ flashrom-spi_prettyprint_statusreg_a25_at25/spi25.c (Arbeitskopie)
@@ -29,8 +29,6 @@
#include "programmer.h"
#include "spi.h"
-void spi_prettyprint_status_register(struct flashchip *flash);
-
static int spi_rdid(unsigned char *readarr, int bytes)
{
const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID };
@@ -312,7 +310,7 @@
}
/* Prettyprint the status register. Common definitions. */
-static void spi_prettyprint_status_register_welwip(uint8_t status)
+void spi_prettyprint_status_register_welwip(uint8_t status)
{
msg_cdbg("Chip status register: Write Enable Latch (WEL) is "
"%sset\n", (status & (1 << 1)) ? "" : "not ");
@@ -321,144 +319,38 @@
}
/* Prettyprint the status register. Common definitions. */
-static void spi_prettyprint_status_register_common(uint8_t status)
+void spi_prettyprint_status_register_bp3210(uint8_t status, int bp)
{
- msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
- "%sset\n", (status & (1 << 5)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is "
- "%sset\n", (status & (1 << 4)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
- "%sset\n", (status & (1 << 3)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
- "%sset\n", (status & (1 << 2)) ? "" : "not ");
- spi_prettyprint_status_register_welwip(status);
-}
-
-/* Prettyprint the status register. Works for
- * AMIC A25L series
- */
-void spi_prettyprint_status_register_amic_a25l(uint8_t status)
-{
- msg_cdbg("Chip status register: Status Register Write Disable "
- "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
- spi_prettyprint_status_register_common(status);
-}
-
-/* Prettyprint the status register. Common definitions. */
-static void spi_prettyprint_status_register_at25_srplepewpp(uint8_t status)
-{
- msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) "
- "is %sset\n", (status & (1 << 7)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 6 "
- "is %sset\n", (status & (1 << 6)) ? "" : "not ");
- msg_cdbg("Chip status register: Erase/Program Error (EPE) "
- "is %sset\n", (status & (1 << 5)) ? "" : "not ");
- msg_cdbg("Chip status register: WP# pin (WPP) "
- "is %sactive\n", (status & (1 << 4)) ? "not " : "");
-}
-
-int spi_prettyprint_status_register_at25df(struct flashchip *flash)
-{
- uint8_t status;
-
- status = spi_read_status_register();
- msg_cdbg("Chip status register is %02x\n", status);
-
- spi_prettyprint_status_register_at25_srplepewpp(status);
- msg_cdbg("Chip status register: Software Protection Status (SWP): ");
- switch (status & (3 << 2)) {
- case 0x0 << 2:
- msg_cdbg("no sectors are protected\n");
- break;
- case 0x1 << 2:
- msg_cdbg("some sectors are protected\n");
- /* FIXME: Read individual Sector Protection Registers. */
- break;
- case 0x3 << 2:
- msg_cdbg("all sectors are protected\n");
- break;
- default:
- msg_cdbg("reserved for future use\n");
- break;
+ switch (bp) {
+ /* Fall through. */
+ case 3:
+ msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) "
+ "is %sset\n", (status & (1 << 5)) ? "" : "not ");
+ case 2:
+ msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) "
+ "is %sset\n", (status & (1 << 4)) ? "" : "not ");
+ case 1:
+ msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) "
+ "is %sset\n", (status & (1 << 3)) ? "" : "not ");
+ case 0:
+ msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) "
+ "is %sset\n", (status & (1 << 2)) ? "" : "not ");
}
- spi_prettyprint_status_register_welwip(status);
- return 0;
}
-int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash)
+/* Prettyprint the status register. Unnamed bits. */
+void spi_prettyprint_status_register_bit(uint8_t status, int bit)
{
- /* FIXME: We should check the security lockdown. */
- msg_cdbg("Ignoring security lockdown (if present)\n");
- msg_cdbg("Ignoring status register byte 2\n");
- return spi_prettyprint_status_register_at25df(flash);
+ msg_cdbg("Chip status register: Bit %i "
+ "is %sset\n", bit, (status & (1 << bit)) ? "" : "not ");
}
-int spi_prettyprint_status_register_at25f(struct flashchip *flash)
+static void spi_prettyprint_status_register_common(uint8_t status)
{
- uint8_t status;
-
- status = spi_read_status_register();
- msg_cdbg("Chip status register is %02x\n", status);
-
- spi_prettyprint_status_register_at25_srplepewpp(status);
- msg_cdbg("Chip status register: Bit 3 "
- "is %sset\n", (status & (1 << 3)) ? "" : "not ");
- msg_cdbg("Chip status register: Block Protect 0 (BP0) is "
- "%sset, %s sectors are protected\n",
- (status & (1 << 2)) ? "" : "not ",
- (status & (1 << 2)) ? "all" : "no");
+ spi_prettyprint_status_register_bp3210(status, 3);
spi_prettyprint_status_register_welwip(status);
- return 0;
}
-int spi_prettyprint_status_register_at25fs010(struct flashchip *flash)
-{
- uint8_t status;
-
- status = spi_read_status_register();
- msg_cdbg("Chip status register is %02x\n", status);
-
- msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
- "is %sset\n", (status & (1 << 7)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
- "%sset\n", (status & (1 << 6)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
- "%sset\n", (status & (1 << 5)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 4 is "
- "%sset\n", (status & (1 << 4)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
- "%sset\n", (status & (1 << 3)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
- "%sset\n", (status & (1 << 2)) ? "" : "not ");
- /* FIXME: Pretty-print detailed sector protection status. */
- spi_prettyprint_status_register_welwip(status);
- return 0;
-}
-
-int spi_prettyprint_status_register_at25fs040(struct flashchip *flash)
-{
- uint8_t status;
-
- status = spi_read_status_register();
- msg_cdbg("Chip status register is %02x\n", status);
-
- msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
- "is %sset\n", (status & (1 << 7)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
- "%sset\n", (status & (1 << 6)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
- "%sset\n", (status & (1 << 5)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is "
- "%sset\n", (status & (1 << 4)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
- "%sset\n", (status & (1 << 3)) ? "" : "not ");
- msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
- "%sset\n", (status & (1 << 2)) ? "" : "not ");
- /* FIXME: Pretty-print detailed sector protection status. */
- spi_prettyprint_status_register_welwip(status);
- return 0;
-}
-
/* Prettyprint the status register. Works for
* ST M25P series
* MX MX25L series
@@ -514,17 +406,13 @@
bpt[(status & 0x1c) >> 2]);
}
-void spi_prettyprint_status_register(struct flashchip *flash)
+int spi_prettyprint_status_register(struct flashchip *flash)
{
uint8_t status;
status = spi_read_status_register();
msg_cdbg("Chip status register is %02x\n", status);
switch (flash->manufacture_id) {
- case AMIC_ID:
- if ((flash->model_id & 0xff00) == 0x2000)
- spi_prettyprint_status_register_amic_a25l(status);
- break;
case ST_ID:
if (((flash->model_id & 0xff00) == 0x2000) ||
((flash->model_id & 0xff00) == 0x2500))
@@ -549,6 +437,7 @@
}
break;
}
+ return 0;
}
int spi_chip_erase_60(struct flashchip *flash)
@@ -949,7 +838,7 @@
return 0;
}
-static int spi_write_status_register(struct flashchip *flash, int status)
+int spi_write_status_register(struct flashchip *flash, int status)
{
int ret = 1;
@@ -1075,128 +964,6 @@
return 0;
}
-int spi_disable_blockprotect_at25df(struct flashchip *flash)
-{
- uint8_t status;
- int result;
-
- status = spi_read_status_register();
- /* If block protection is disabled, stop here. */
- if ((status & (3 << 2)) == 0)
- return 0;
-
- msg_cdbg("Some block protection in effect, disabling\n");
- if (status & (1 << 7)) {
- msg_cdbg("Need to disable Sector Protection Register Lock\n");
- if ((status & (1 << 4)) == 0) {
- msg_cerr("WP# pin is active, disabling "
- "write protection is impossible.\n");
- return 1;
- }
- /* All bits except bit 7 (SPRL) are readonly. */
- result = spi_write_status_register(flash, status & ~(1 << 7));
- if (result) {
- msg_cerr("spi_write_status_register failed\n");
- return result;
- }
-
- }
- /* Global unprotect. Make sure to mask SPRL as well. */
- result = spi_write_status_register(flash, status & ~0xbc);
- if (result) {
- msg_cerr("spi_write_status_register failed\n");
- return result;
- }
- status = spi_read_status_register();
- if ((status & (3 << 2)) != 0) {
- msg_cerr("Block protection could not be disabled!\n");
- return 1;
- }
- return 0;
-}
-
-int spi_disable_blockprotect_at25df_sec(struct flashchip *flash)
-{
- /* FIXME: We should check the security lockdown. */
- msg_cinfo("Ignoring security lockdown (if present)\n");
- return spi_disable_blockprotect_at25df(flash);
-}
-
-int spi_disable_blockprotect_at25f(struct flashchip *flash)
-{
- /* spi_disable_blockprotect_at25df is not really the right way to do
- * this, but the side effects of said function work here as well.
- */
- return spi_disable_blockprotect_at25df(flash);
-}
-
-int spi_disable_blockprotect_at25fs010(struct flashchip *flash)
-{
- uint8_t status;
- int result;
-
- status = spi_read_status_register();
- /* If block protection is disabled, stop here. */
- if ((status & 0x6c) == 0)
- return 0;
-
- msg_cdbg("Some block protection in effect, disabling\n");
- if (status & (1 << 7)) {
- msg_cdbg("Need to disable Status Register Write Protect\n");
- /* Clear bit 7 (WPEN). */
- result = spi_write_status_register(flash, status & ~(1 << 7));
- if (result) {
- msg_cerr("spi_write_status_register failed\n");
- return result;
- }
- }
- /* Global unprotect. Make sure to mask WPEN as well. */
- result = spi_write_status_register(flash, status & ~0xec);
- if (result) {
- msg_cerr("spi_write_status_register failed\n");
- return result;
- }
- status = spi_read_status_register();
- if ((status & 0x6c) != 0) {
- msg_cerr("Block protection could not be disabled!\n");
- return 1;
- }
- return 0;
-}
-int spi_disable_blockprotect_at25fs040(struct flashchip *flash)
-{
- uint8_t status;
- int result;
-
- status = spi_read_status_register();
- /* If block protection is disabled, stop here. */
- if ((status & 0x7c) == 0)
- return 0;
-
- msg_cdbg("Some block protection in effect, disabling\n");
- if (status & (1 << 7)) {
- msg_cdbg("Need to disable Status Register Write Protect\n");
- /* Clear bit 7 (WPEN). */
- result = spi_write_status_register(flash, status & ~(1 << 7));
- if (result) {
- msg_cerr("spi_write_status_register failed\n");
- return result;
- }
- }
- /* Global unprotect. Make sure to mask WPEN as well. */
- result = spi_write_status_register(flash, status & ~0xfc);
- if (result) {
- msg_cerr("spi_write_status_register failed\n");
- return result;
- }
- status = spi_read_status_register();
- if ((status & 0x7c) != 0) {
- msg_cerr("Block protection could not be disabled!\n");
- return 1;
- }
- return 0;
-}
-
int spi_nbyte_read(int address, uint8_t *bytes, int len)
{
const unsigned char cmd[JEDEC_READ_OUTSIZE] = {
Index: flashrom-spi_prettyprint_statusreg_a25_at25/flashchips.c
===================================================================
--- flashrom-spi_prettyprint_statusreg_a25_at25/flashchips.c (Revision 1245)
+++ flashrom-spi_prettyprint_statusreg_a25_at25/flashchips.c (Arbeitskopie)
@@ -300,6 +300,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l05p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -331,6 +332,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l05p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -363,6 +365,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l05p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -395,6 +398,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l05p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -427,6 +431,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l05p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -459,6 +464,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l05p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -496,6 +502,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l40p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -528,6 +535,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l40p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -560,6 +568,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l40p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -595,6 +604,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l40p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -630,6 +640,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l40p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -660,6 +671,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l40p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -690,6 +702,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l40p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -720,6 +733,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l40p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -750,6 +764,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l40p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -780,6 +795,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l40p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -810,6 +826,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l40p,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -846,6 +863,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25l032,
.unlock = NULL, /* Two status reg bytes (read with 0x35 and 0x05) */
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -882,6 +900,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_amic_a25lq032,
.unlock = NULL, /* Two status reg bytes (read with 0x35 and 0x05) */
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -1499,6 +1518,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_atmel_at26df081a,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -1534,6 +1554,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_at25df,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -1569,6 +1590,7 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_atmel_at26df081a,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
@@ -1586,6 +1608,7 @@
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
+ .printlock = spi_prettyprint_status_register_atmel_at26df081a,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read,
Index: flashrom-spi_prettyprint_statusreg_a25_at25/chipdrivers.h
===================================================================
--- flashrom-spi_prettyprint_statusreg_a25_at25/chipdrivers.h (Revision 1245)
+++ flashrom-spi_prettyprint_statusreg_a25_at25/chipdrivers.h (Arbeitskopie)
@@ -43,23 +43,37 @@
int spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);
uint8_t spi_read_status_register(void);
+int spi_write_status_register(struct flashchip *flash, int status);
+void spi_prettyprint_status_register_bit(uint8_t status, int bit);
+void spi_prettyprint_status_register_bp3210(uint8_t status, int bp);
+void spi_prettyprint_status_register_welwip(uint8_t status);
+int spi_prettyprint_status_register(struct flashchip *flash);
+int spi_disable_blockprotect(struct flashchip *flash);
+int spi_byte_program(int addr, uint8_t databyte);
+int spi_nbyte_program(int addr, uint8_t *bytes, int len);
+int spi_nbyte_read(int addr, uint8_t *bytes, int len);
+int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize);
+int spi_write_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize);
+int spi_aai_write(struct flashchip *flash, uint8_t *buf, int start, int len);
+
+/* a25.c */
+int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash);
+int spi_prettyprint_status_register_amic_a25l40p(struct flashchip *flash);
+int spi_prettyprint_status_register_amic_a25l032(struct flashchip *flash);
+int spi_prettyprint_status_register_amic_a25lq032(struct flashchip *flash);
+
+/* at25.c */
int spi_prettyprint_status_register_at25df(struct flashchip *flash);
int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash);
int spi_prettyprint_status_register_at25f(struct flashchip *flash);
int spi_prettyprint_status_register_at25fs010(struct flashchip *flash);
int spi_prettyprint_status_register_at25fs040(struct flashchip *flash);
-int spi_disable_blockprotect(struct flashchip *flash);
+int spi_prettyprint_status_register_atmel_at26df081a(struct flashchip *flash);
int spi_disable_blockprotect_at25df(struct flashchip *flash);
int spi_disable_blockprotect_at25df_sec(struct flashchip *flash);
int spi_disable_blockprotect_at25f(struct flashchip *flash);
int spi_disable_blockprotect_at25fs010(struct flashchip *flash);
int spi_disable_blockprotect_at25fs040(struct flashchip *flash);
-int spi_byte_program(int addr, uint8_t databyte);
-int spi_nbyte_program(int addr, uint8_t *bytes, int len);
-int spi_nbyte_read(int addr, uint8_t *bytes, int len);
-int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize);
-int spi_write_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize);
-int spi_aai_write(struct flashchip *flash, uint8_t *buf, int start, int len);
/* 82802ab.c */
uint8_t wait_82802ab(struct flashchip *flash);
--
http://www.hailfinger.org/
More information about the flashrom
mailing list