[flashrom] New Intel Chipsets

[Idwer Vollering]

2010/8/5 Wagner, Helge (GE Intelligent Platforms) <Helge.Wagner at ge.com>

> I have added support for some new intel chipsets.
>

If only we could have saved you from doing this twice:

http://www.flashrom.org/pipermail/flashrom/2010-April/thread.html#2896
http://patchwork.coreboot.org/patch/1208/


>
> (At least) for the QM57 which i have tested an additional patch was
> needed as some reserved bits in the "Software Sequencing Flash Control
> Register" (SSFC) needs to be programmed to 1 in the QM57.
>

> Signed-off-by: Helge Wagner <helge.wagner at ge.com>
>

> diff -urN flashrom-0.9.2/chipset_enable.c flashrom/chipset_enable.c
> --- flashrom-0.9.2/chipset_enable.c     2010-08-01 01:16:09.000000000
> +0200
> +++ flashrom/chipset_enable.c   2010-08-05 13:28:29.000000000 +0200
> @@ -1011,7 +1011,21 @@
>        {0x1166, 0x0205, OK, "Broadcom", "HT-1000",
> enable_flash_ht1000},
>        {0x8086, 0x3b00, NT, "Intel", "3400 Desktop",
> enable_flash_ich10},
>        {0x8086, 0x3b01, NT, "Intel", "3400 Mobile",
> enable_flash_ich10},
> +       {0x8086, 0x3b02, NT, "Intel", "P55",
> enable_flash_ich10},
> +       {0x8086, 0x3b03, NT, "Intel", "PM55",
> enable_flash_ich10},
> +       {0x8086, 0x3b06, NT, "Intel", "H55",
> enable_flash_ich10},
> +       {0x8086, 0x3b07, OK, "Intel", "QM57",
> enable_flash_ich10},
> +       {0x8086, 0x3b08, NT, "Intel", "H57",
> enable_flash_ich10},
> +       {0x8086, 0x3b09, NT, "Intel", "HM55",
> enable_flash_ich10},
> +       {0x8086, 0x3b0a, NT, "Intel", "Q57",
> enable_flash_ich10},
> +       {0x8086, 0x3b0b, NT, "Intel", "HM57",
> enable_flash_ich10},
>        {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF",
> enable_flash_ich10},
> +       {0x8086, 0x3b0e, NT, "Intel", "B55",
> enable_flash_ich10},
>

See below


> +       {0x8086, 0x3b0f, NT, "Intel", "QS57",
> enable_flash_ich10},
> +       {0x8086, 0x3b12, NT, "Intel", "3400",
> enable_flash_ich10},
> +       {0x8086, 0x3b14, NT, "Intel", "3420",
> enable_flash_ich10},
> +       {0x8086, 0x3b16, NT, "Intel", "3450",
> enable_flash_ich10},
> +       {0x8086, 0x3b1e, NT, "Intel", "B55",
> enable_flash_ich10},
>

Thanks for finding/adding "B55": the friendly name for this chipset is empty
in forementioned patch (see patchwork).
Do you perchance have a verbose log of flashrom (flashrom -V) from that
chipset ?

       {0x8086, 0x7198, OK, "Intel", "440MX",
> enable_flash_piix4},
>        {0x8086, 0x25a1, OK, "Intel", "6300ESB",
> enable_flash_ich_4e},
>        {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100",
> enable_flash_ich_dc},
> diff -urN flashrom-0.9.2/ichspi.c flashrom/ichspi.c
> --- flashrom-0.9.2/ichspi.c     2010-07-28 00:41:39.000000000 +0200
> +++ flashrom/ichspi.c   2010-08-05 13:30:32.000000000 +0200
> @@ -560,7 +560,9 @@
>        }
>
>        /* Assemble SSFS + SSFC */
> -       temp32 = 0;
> +       /* keep reserved bits (23-19,7,0) */
> +       temp32 = REGREAD32(ICH9_REG_SSFS);
> +       temp32 &= 0xF8008100;
>
>        /* clear error status registers */
>        temp32 |= (SSFS_CDS + SSFS_FCERR);
>
>
>
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