[flashrom] [PATCH] add support for SIS963
Carl-Daniel Hailfinger
c-d.hailfinger.devel.2006 at gmx.net
Mon Aug 2 03:55:30 CEST 2010
Hi David,
I would really like the code below to end up in flashrom because it has
the safety checks we need once we enable autodetection. IIRC you said
many Winbond Super I/O chips have the same interface, so maybe a
renaming of the function is in order, and considering that this function
duplicates some existing functionality, the other function doing the
lpc->parallel write enable should be killed.
On 25.06.2010 12:46, David Borg wrote:
> Index: chipset_enable.c
> ===================================================================
> --- chipset_enable.c (revision 1060)
> +++ chipset_enable.c (working copy)
> @@ -198,6 +198,98 @@
> }
>
> /* Datasheet:
> + * - Name: Winbond W83697HF LPC I/O
> + * - PDF: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/w83697hf.pdf
> + */
> +static int enable_flash_superio_W83697HF()
> +{
> +#define EFER 0x2E
> +#define EFIR EFER
> +
> + uint8_t cr26;
> + uint8_t cr24;
> + uint8_t cr2A;
> + int ret = 0;
> +
> + w836xx_ext_enter(EFER);
> +
> + cr24 = sio_read(EFIR, 0x24);
> + if (!(cr24 & 0x02)) {
> + cr2A = sio_read(EFIR, 0x2A);
> + if ((cr2A & 0xf0) == 0xf0) {
> + if (!(cr24 & 0x08)) {
> +
> + /* Paranoid - Disable register lock (default off) */
> + cr26 = sio_read(EFIR, 0x26);
> + if (cr26 & 0x20) {
> + sio_write(EFIR, 0x26, (cr26 & (~0x20)));
> + }
> +
> + sio_write(EFIR, 0x24, (cr24 |= 0x08));
> + if (sio_read(EFIR, 0x24) != cr24) {
> + msg_perr("Error: couldn't set MEMW#\n");
> + ret = -1;
> + }
> +
> + /* Paranoid - Restore register lock */
> + sio_write(EFIR, 0x26, cr26);
> +
> + msg_pdbg("Parallel flash size accessible: ");
> + switch ((cr24 & 0x30) >> 4) {
> + case 0:
> + msg_pdbg("1Mbit\n");
> + break;
> + case 1:
> + msg_pdbg("2Mbit\n");
> + break;
> + case 2:
> + msg_pdbg("4Mbit\n");
> + break;
> + default:
> + msg_perr
> + ("Error: CR24 reserved bits set, must be corrected manually!\n");
> + ret = -1;
> + }
> + } else {
> + msg_pdbg("MEMW# already enabled.\n");
> + }
> + } else {
> + msg_perr
> + ("Flash interface unavailable - GPIO's in use!\n");
> + ret = -1;
> + }
> + } else {
> + msg_pdbg("We have LPC flash, not setting up SuperIO.\n");
> + }
> +
> + w836xx_ext_leave(EFER);
> + return ret;
> +
> +#undef EFIR
> +#undef EFER
> +}
>
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
More information about the flashrom
mailing list