[flashrom] MSI IM-945GSE-A testreport

spam at systol-ng.god.lan spam at systol-ng.god.lan
Thu Dec 31 10:50:42 CET 2009


Thanks for the great app! Just for reference I would like to report my
results on a MSI mainboard:

IM-945GSE-A see:
http://www.msi.com/index.php?func=proddesc&maincat_no=388&prod_no=1693

/sys/devices/virtual/dmi/id/
	board_vendor		MSI
	board_name		A9830IMS
	bios_vendor		American Megatrends Inc.

Bridge:		ICH7M
Flash chip:	"Macronix MX25L4005" (512 KB, SPI) at physical address 0xfff80000

The bios write protect is located on GPIO 24 on the ICH7M according to
the manual. But there's an easy way in BIOS to enable this.

Reading flash is OK. 
Not tested writing yet, will test it with next bios upgrade. 

Below is a flashrom log attached.

Many thanks again!

Henk Vergonet 

------------------------- flashrom log -------------------------
flashrom v0.9.1-r710
No coreboot table found.
Found chipset "Intel ICH7M", enabling flash write... 
0xfff80000/0xffb80000 FWH IDSEL: 0x0
0xfff00000/0xffb00000 FWH IDSEL: 0x0
0xffe80000/0xffa80000 FWH IDSEL: 0x1
0xffe00000/0xffa00000 FWH IDSEL: 0x1
0xffd80000/0xff980000 FWH IDSEL: 0x2
0xffd00000/0xff900000 FWH IDSEL: 0x2
0xffc80000/0xff880000 FWH IDSEL: 0x3
0xffc00000/0xff800000 FWH IDSEL: 0x3
0xff700000/0xff300000 FWH IDSEL: 0x4
0xff600000/0xff200000 FWH IDSEL: 0x5
0xff500000/0xff100000 FWH IDSEL: 0x6
0xff400000/0xff000000 FWH IDSEL: 0x7
0xfff80000/0xffb80000 FWH decode enabled
0xfff00000/0xffb00000 FWH decode disabled
0xffe80000/0xffa80000 FWH decode disabled
0xffe00000/0xffa00000 FWH decode disabled
0xffd80000/0xff980000 FWH decode disabled
0xffd00000/0xff900000 FWH decode disabled
0xffc80000/0xff880000 FWH decode disabled
0xffc00000/0xff800000 FWH decode disabled
0xff700000/0xff300000 FWH decode disabled
0xff600000/0xff200000 FWH decode disabled
0xff500000/0xff100000 FWH decode disabled
0xff400000/0xff000000 FWH decode disabled
BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0

Root Complex Register Block address = 0xfed1c000
GCS = 0x130464: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3020
0x00: 0x0004     (SPIS)
0x02: 0x4140     (SPIC)
0x04: 0x00000000 (SPIA)
0x08: 0x000020c2 (SPID0)
0x0c: 0x00000000 (SPID0+4)
0x10: 0x00000000 (SPID1)
0x14: 0x00000000 (SPID1+4)
0x18: 0x00000000 (SPID2)
0x1c: 0x00000000 (SPID2+4)
0x20: 0x00000000 (SPID3)
0x24: 0x00000000 (SPID3+4)
0x28: 0x00000000 (SPID4)
0x2c: 0x00000000 (SPID4+4)
0x30: 0x00000000 (SPID5)
0x34: 0x00000000 (SPID5+4)
0x38: 0x00000000 (SPID6)
0x3c: 0x00000000 (SPID6+4)
0x40: 0x00000000 (SPID7)
0x44: 0x00000000 (SPID7+4)
0x50: 0x00000000 (BBAR)
0x54: 0x0004     (PREOP)
0x56: 0x543b     (OPTYPE)
0x58: 0x05d80302 (OPMENU)
0x5c: 0x0006019f (OPMENU+4)
0x60: 0x00000000 (PBR0)
0x64: 0x00000000 (PBR1)
0x68: 0x00000000 (PBR2)
0x6c: 0x00000000 (PBR3)

Programming OPCODES... 
program_opcodes: preop=0006 optype=463b opmenu=05d80302c79f0190
done
SPI Read Configuration: prefetching disabled, caching enabled, OK.
This chipset supports the following protocols: SPI.
Calibrating delay loop... 793M loops per second, 100 myus = 199 us. OK.
...
Probing for Macronix MX25L2005, 256 KB: RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013
Probing for Macronix MX25L4005, 512 KB: RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013
Chip status register is 00
Chip status register: Status Register Write Disable (SRWD) is not set
Chip status register: Bit 6 is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found chip "Macronix MX25L4005" (512 KB, SPI) at physical address 0xfff80000.
Probing for Macronix MX25L8005, 1024 KB: RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013
...
RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013
Not unmapping zero size at (nil)
Probing for EON unknown EON SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000.
RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013
Not unmapping zero size at (nil)
Probing for Macronix unknown Macronix SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000.
RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013
Not unmapping zero size at (nil)
Probing for PMC unknown PMC SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000.
RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013
Not unmapping zero size at (nil)
Probing for SST unknown SST SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000.
RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013
Not unmapping zero size at (nil)
Probing for ST unknown ST SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000.
RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013
Not unmapping zero size at (nil)
No operations were specified.




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