I'm a student researching digital forensics and acquisition of memory using hardware. I had a few ideas I'm hoping is ok that I run by everyone here. <br><br>I have Tyan s2891 motherboard with one dual core Opteron and an fpga in the second cpu socket. I would like to research two things that I would like to do in a customization to my own linuxbios setup. <br><br>1. Disable the Opteron's integrated memory controller and use my own fpga memory controller in the second cpu socket on the motherboard. In this case I would like CPU read/writes to memory to follow a path out of Northbridge to my memory controller in the second CPU socket. (I'm not worried about latency problems at this point.) <br><br>The FPGA Im talking about (actually DRC computers setup) is seen the to the OS as another PCI device and not another CPU node. So what Im theorizing that needs to be done is disable the integrated memory controller in northbridge in the register called
dramconfigreglo=disinrcvrs (In AMD developer documentation) and change the DRAM address map to point to the HT link where my memory controller is.<br><br>-or-<br><br>2. Continue to use the Opterons integrated memory controller and send a copy of all memory writes (not reads) to my own fpga memory controller in the second cpu socket. I dont see anywhere in the developer documentation in which there is a register setting to realize this so Im not sure if this is possible in AMDs direct connect architecture.<br><br>Thanks to all for taking your time out to read this as well as your ideas and direction! <br><br>-nate<br><p>
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