[coreboot] Wired problems with Intel skylake based board

Christian Gmeiner christian.gmeiner at gmail.com
Mon Sep 24 13:04:50 CEST 2018

Hi all

I have an almost working coreboot/u-boot boot solution based on
kabylake FSP. Most of the time
the system works as expected but from time to rebooting the system
fails completely. On my board,
which is powered by an COM Express module (i3-6100U), there are two
FPGAs connected via PCIe to the
system where one is used to reset the system. The reset is done via SYS_RESET#.

Now I run into different kind of issues:
- pcie link training fails from time to time multiple times with the
end result at FSP does multiple
  global resets.
- looks like PLTRST# of the sunrisepoint pch holds the system in reset
for minutes.

Are there any hints to debug my issues?
Christian Gmeiner, MSc


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