[coreboot] Wired problems with Intel skylake based board

Nico Huber nico.h at gmx.de
Tue Oct 16 18:11:11 CEST 2018

On 10/16/18 11:42 AM, Christian Gmeiner wrote:
> Am Di., 16. Okt. 2018 um 11:25 Uhr schrieb Peter Stuge <peter at stuge.se>:
>> Christian Gmeiner wrote:
>>> The system does not hang if I only change
>>>     mem_cfg->PegDisableSpreadSpectrumClocking = 1;
>>> But it has no effect on the PCIe reference clock and it looks like
>>> spread spectrum is still used.
>> AFAIK Peg refers to PCI Express Graphics. Maybe there's another,
>> per-port, setting?
> Could be but and the comment is about this variable is wrong:
> https://github.com/coreboot/coreboot/blob/f3122426b851b9ca009e501a8d8c60d062f84c98/src/vendorcode/intel/fsp/fsp2_0/skykabylake/FspmUpd.h#L534

Why wrong? It just doesn't tell for what clock source it is. Or clock
input? even that's not clear to me. But I agree that it doesn't seem
to apply in your case. PEG is PCIe too, but not a feature of your


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