[coreboot] riscv: how to running coreboot on HiFive Unleashed?

[Jonathan Neuschäfer]

Hi!

On Mon, Nov 26, 2018 at 02:54:46PM +0800, 王翔 wrote:
> I try to running coreboot on HiFive Unleashed, but nothing come from uart.
> 
> 
> I tested by the following steps:
> 
> 
> 1.  Write hifive-unleashed-a00-1.0-2018-03-20.gpt to TF card.
> 2. Change MSEL to 11 and boot linux
> 3. Copy coreboot.rom via scp
> 4. Write coreboot.rom to /dev/mtd0 by flashcp.
> 5. Change MSEL to 15 and boot coreboot. No response on uart.
> 
> 
> 
> Do you have any suggestions?

How did you listen to the UART? Note that the FTDI Chip on the H5U will
show up as two serial ports on the computer that it is connected to
(usually /dev/ttyUSB0 and /dev/ttyUSB1). The first one is for JTAG and
the second one is for UART.
Also make sure that you configure the right baud rate (115200 usually)
on /dev/ttyUSB1.

You might also have to power-cycle the board and/or press the reset
button. Sometimes that helps.

If you continue to see no output, perhaps there is a bug in coreboot
that prevents the output. Whenever I tested coreboot on the H5U, I could
always see output, but I haven't tested it recently.



Jonathan Neuschäfer
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 833 bytes
Desc: not available
URL: <http://mail.coreboot.org/pipermail/coreboot/attachments/20181126/4c7c6903/attachment.asc>