[coreboot] Further coreboot releases, setting new standards

Arthur Heymans arthur at aheymans.xyz
Fri Nov 23 14:41:21 CET 2018


Dear coreboot community

While the next coreboot release is due for november 2018, I think it
is worthwhile to think about further releases and standards we want to
set.

In the past coreboot adapted numerous general improvements, which were not
always ported to all coreboot targets. Keeping those platforms and their
respective codepath then typically becomes a burden often accompanied
with regressions. The reasonable decision to drop these targets was then
made. A few examples of this were dropping targets that had a romcc
compiled romstage (in favor of GCC compiled romstage running in Cache As
Ram) and dropping targets without early_cbmem.

Coreboot hasn't stood still and it might be time to set some new
standards again which platforms have to conform.
Since I mostly know x86 the following ideas will be quite x86 centric.
I'd argue for requiring the following:

- getting rid of NO_RELOCATABLE_RAMSTAGE on x86

This allows the ramstage to be relocated in a place out of the way of
the OS such that copying the memory is unnecessary during S3 resume.

- config NO_CAR_GLOBAL_MIGRATION on all x86 targets

This is now achieved using postcar stage. This would mean that all x86
targets have a common way to set up and get rid of the CAR environment
and car globals.

- config C_ENVIRONMENT_BOOTBLOCK on all x86 targets

This means that the bootblock is responsible to set up the CAR, which
means that the rest of the bootblock can be compiled with GCC.
This effectively makes ROMCC bootblocks obsolete.
Having a bootblock with access to a working stack effectively increases
the bootflow flexibility. This is reflected in for instance when using
VBOOT, which can then verify all stages starting from the romstage,
hence also allowing a fallback with regards to ram initialization (vs.
having the romstage only in the RO_WP region). It would be a important
step in making vboot useful and usable and maybe default on all targets.


Any suggestions, reflections, ideas, remarks?

Kind regards

Arthur




More information about the coreboot mailing list