[coreboot] [SMSC SCH3114] Super I/O issues

Alexander Couzens lynxis at fe80.eu
Fri Nov 16 15:48:29 CET 2018

Hi Konstantin,

the IRQ are usually freely configurable via the LDN.
Using the lower bits of 0x70h is quite common to select the IRQ.

The SuperIO is connected via LPC, which supports all legacy IRQs by
Further, depending on the Chipset, it must allow to receive the IRQs
over the SerIRQ line of the LPC.

Best Regards,
Alexander Couzens

mail: lynxis at fe80.eu
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