[coreboot] FSP 1.0 Sandy-/Ivybridge removal

[ron minnich]

I agree, we should always bias to open source, and if there are
issues, we fix 'em.

Thanks to the people who did the hard work on the sandy and ivy code :-)

ron
On Mon, Nov 12, 2018 at 9:39 AM Arthur Heymans <arthur at aheymans.xyz> wrote:
>
> Zaolin <zaolin at das-labor.org> writes:
>
> > Hey coreboot folks,
> >
> > I want to remove the old Sandy-/Ivybridge FSP 1.0 implementation from
> > the tree:
> >
> > https://review.coreboot.org/#/c/coreboot/+/29402/
> >
> > We already have an Open Source replacement for it ( under src/{nb,sb} )
> > which can replace the legacy FSP integration.
> >
>
> To make this statement more accurate. There are 3 bootpaths for sandy-/ivybridge.
>
> 1. Fully open source (including raminit)
> 2. raminit done by mrc.bin developed by google engineers, with the
> mrc.bin in the blob repo, which is for the most part interchangeable
> with the fully open source raminit
> 3. FSP 1.0 bootpath
>
> bootpaths 1 and 2 have 43 boards in the coreboot tree. (based on 'chip
> northbridge/intel/sandybridge in devicetree.cb)
> The FSP bootpath has 2 boards that are likely not obtainable.
>
> > Does anyone use the FSP stuff or has complains about the current plan?
> >
> >
> > BR, Zaolin
>
> Given the unpopularity, lack of maintenance, the availability of a much
> more popular bootpath and actual hindrance in moving the common codebase
> forward (for instance when implementing parallel mp init for i945 till
> sandybridge, some code still has to be left in place to keep that fsp
> bootpath happy) I fully endorse the removal of this code.
>
>
> --
> ==============
> Arthur Heymans
>
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