[coreboot] FSP - Momory configuration

Zvi Vered veredz72 at gmail.com
Fri Nov 9 21:31:49 CET 2018


Hello,

The memory configuration contains (also) the following fields:
tCL
tRP_tRCD
tWR
tWTR
tRRD
tRTP
tFAW

According to the datasheet of the DDR:
tCL(avg): 0.47(Min) to 0.53(Max)

The value in the BCT can be from: 1..255

How should I translate the values from datasheet to Intel's BCT ?
Should we take the min or max value ?

Thank you,
Zvika
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot/attachments/20181109/b62724e9/attachment.html>


More information about the coreboot mailing list