[coreboot] Why coreboot for riscv does not support multi-core?

王翔 merle at tya.email
Fri May 18 05:46:54 CEST 2018


> In short: Because it was easier to delay the problem until later.
>
>On Thu, May 17, 2018 at 03:55:37PM +0800, 王翔 wrote:
>> The current code does not set the stack pointer for hart alone.
>> The Linux kernel runs in s-mode and cannot set the stack pointer for m-mode.
>> If m-mode does not have a separate stack for hart, then m-mode cannot save any state about the current hart.
>> 
>> Is it necessary to initialize the stack pointer for each hart?
>
>Yes, I think this needs to be implemented.
>
>Note also, that the new SBI based on the ecall instruction is not
>implemented in coreboot.
>
>
>Jonathan Neuschäfer

Is coreboot's payload a bootloader running in m-mode ?
If not, how does the SBI interrupt service be implemented ?

WangXiang
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