[coreboot] ARM Veyron Speedy - Replacing 11.6 inch display for 15 inch

[Mark Wylde]

The ASUS C201 comes with an 11.6inch EDP display. I was wondering if you could simply swap it for a 15'' EDP display. I tried it, but as expected it didn't work, however the backlight came on and I had the following logs:

----------------------------------------------------------------
Attempting to setup EDP display.
do not get hpd single, force hpd
Extracted contents:
header:          00 ff ff ff ff ff ff 00
serial number:   0d ae c4 15 00 00 00 00 28 17
version:         01 04
basic params:    95 22 13 78 02
chroma info:     ef 05 90 54 52 93 29 25 50 54
established:     00 00 00
standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
descriptor 1:    5e 35 80 96 70 38 14 40 2c 1c 24 00 58 c1 10 00 00 18
descriptor 2:    00 00 00 fe 00 4e 31 35 36 48 47 45 2d 45 41 42 0a 20
descriptor 3:    00 00 00 fe 00 43 4d 4e 0a 20 20 20 20 20 20 20 20 20
descriptor 4:    00 00 00 fe 00 4e 31 35 36 48 47 45 2d 45 41 42 0a 20
extensions:      00
checksum:        1d

Manufacturer: CMN Model 15c4 Serial Number 0
Made week 40 of 2013
EDID version: 1.4
Digital display
6 bits per primary color channel
DisplayPort interface
Maximum image size: 34 cm x 19 cm
Gamma: 220%
Check DPMS levels
Supported color formats: RGB 4:4:4
First detailed timing is preferred timing
Established timings supported:
Standard timings supported:
Detailed timings
Hex of detail: 5e358096703814402c1c240058c110000018
Detailed mode (IN HEX): Clock 136620 KHz, 158 mm x c1 mm
               0780 07ac 07c8 0816 hborder 0
               0438 043a 043e 044c vborder 0
               -hsync -vsync
Did detailed timing
Hex of detail: 000000fe004e3135364847452d4541420a20
ASCII string: N156HGE-EAB
Hex of detail: 000000fe00434d4e0a202020202020202020
ASCII string: CMN
Hex of detail: 000000fe004e3135364847452d4541420a20
ASCII string: N156HGE-EAB
Checksum
Checksum: 0x1d (valid)
Configuring PLL at ff760040 with NF = 1346, NR = 59 and NO = 4 (VCO = 547525KHz, output = 136881KHz)
requested signal parameters: lane 0 voltage 0.6V pre_emph 0dB
requested signal parameters: lane 1 voltage 0.6V pre_emph 0dB
using signal parameters: voltage 0.6V pre_emph 0dB
requested signal parameters: lane 0 voltage 0.8V pre_emph 0dB
requested signal parameters: lane 1 voltage 0.8V pre_emph 0dB
using signal parameters: voltage 0.8V pre_emph 0dB
requested signal parameters: lane 0 voltage 1.2V pre_emph 0dB
requested signal parameters: lane 1 voltage 1.2V pre_emph 0dB
using signal parameters: voltage 1.2V pre_emph 0dB
clock recovery reached max voltage
clock recovery failed
link train failed!
edp enable err
----------------------------------------------------------------

It looks to me (as a complete noob) that the display (http://www.yslcd.com.tw/docs/product/N156HGE-EAB.pdf) needs around 3.3 volts.

Looking at the code, it seems the ./src/soc/rockchip/common/edp.c handles this part of the booting process. Line 38 seems to imply the maximum voltage is 1.2v.

----------------------------------------------------------------
static const char *voltage_names[] = {
"0.4V", "0.6V", "0.8V", "1.2V"
};
----------------------------------------------------------------

Is there a reason this is the maximum? Unfortunately there doesn't seem to be much information on the specifications of the C201, I guess as it's not really an open machine. Maybe the motherboard can only handle that voltage?

I'm extremely new to coreboot, and to be honest not even sure the C201 can even handle a 15'' display. Does anyone know if I'm on the right track, or if this is a pointless exercise?

Thank you and sorry if these are silly questions.

Mark
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