[coreboot] Porting Kabylake laptop

chrisglowaki at tutanota.com chrisglowaki at tutanota.com
Tue Jun 26 12:55:12 CEST 2018

26. Jun 2018 07:44 by alexfeinman at hotmail.com <mailto:alexfeinman at hotmail.com>:

> Chris,
> The GPIO tables are usually compiled into the BIOS C code and not into ASL. While decompiling DSDT can give you some insight into what GPIOs are used for say WLAN power control or some of the hardware interrupts, there is also a number of Kaby Lake pins that drive system signals or control onboard hardware without going through ASL. For instance Coreboot build for KBL RVP3 uses this:
> https://github.com/coreboot/coreboot/blob/master/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/gpio.h <https://github.com/coreboot/coreboot/blob/master/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/gpio.h>
> What Niko suggests is to review carefully all the lines that use GPIO_CFG_GPO (output) to ensure that no pins that are configured as output unless you are absolutely sure about where they go. Of course, this requires you to understand the code

Hi Alex,
I mentioned dumping the ACPI code to ask if I can use it in the .asl files in mainboard directory (for example https://github.com/coreboot/coreboot/blob/master/src/mainboard/purism/librem_skl/acpi/ec.asl <https://github.com/coreboot/coreboot/blob/master/src/mainboard/purism/librem_skl/acpi/ec.asl>). Dumping data for gpio.h I guess is hard because inteltool doesn't support Kabylake and I have no schematics. Nico said I can try booting without the GPIO config, but I don't know if the laptop will be usable without it.

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