[coreboot] RISC-V HiFive Unleashed board added to coreboot - has PCI-e slots via exp board

Rudolf Marek r.marek at assembler.cz
Sun Jul 1 17:32:07 CEST 2018

Hi all

See [1]

> terpstraWesley W. TerpstraVerified SiFive Account
> 2d
> I saw a few posts on the internet, which misrepresented what I was expressing. I never suggested reverse engineering our partner’s IP!
> SiFive is committed to supporting the open-source community. We are pleased to report that after discussions with our IP partners, we are now able to make available all the source code required to initialize the HiFive Unleashed board. The board’s boot sequence is described in the manual. The assembly code in the initial reset ROM is listed in the manual Chapter 6.1 “Reset Vector”. The firmware in the ZSBL mask ROM is directly readable by software on the chip, and we will be making the full source code available shortly. The source code for FSBL including the DDR initialization will also be available shortly. We can attest there is no other firmware run by the system during boot.

And yes there is at least a chapter 20.3 Reset and Initialization in [2], which boils down of taking stuff out of reset, programming clocks and sets all values. 


[1] https://forums.sifive.com/t/ddr-controller-configuration-register-values-for-hifive-unleashed/1334/8
[2] https://static.dev.sifive.com/FU540-C000-v1.0.pdf now.

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