[coreboot] Doubt about SPD init in Skylake
Nico Huber
nico.h at gmx.de
Thu Jan 4 22:53:27 CET 2018
Hi Merle,
you should always keep the mailing list addressed. Otherwise you'll
get less responses, obviously.
Please tell us more about your project. Is it a hobby thing? or do you
work on a professional product? it really matters, because in the latter
case you should try to get a contact to Intel and ask them.
On 04.01.2018 09:08, 王翔 wrote:
> I found this array on https://github.com/IntelFsp/FSP/blob/Skylake/SkylakeFspBinPkg/Docs/SkylakeFspIntegrationGuide.pdf 4.1.2.1 section .
> But , what's meaning?
It's not documented. Some lucky people have access to the FSP source
code and might be able to tell.
> How get this value ?
From board schematics and Intel's Platform Design Guide mostly.
Nico
More information about the coreboot
mailing list