[coreboot] BDX-DE PCI init fail

[David Hendricks]

Hi Hilbert,
For what it's worth, I was able to boot Linux as the payload without any
obvious problems. It might be good to try other payloads, or see if you can
enable serial console earlier in u-boot to find exactly where it reboots.

Here is my CPUID and microcode info printed by coreboot during ramstage:
microcode: sig=0x50664 pf=0x10 revision=0xf00000c
CPUID: 00050664
Cores: 32
Stepping: Y0
Revision ID: 05

So it appears I am using the production CPU and microcode that Zoran
suggested. To obtain this, I downloaded SRV_P_203.exe from Intel's website
and converted M1050664_0F00000C.TXT into a C-style header that can be
included by coreboot's build system.


On Thu, Jan 4, 2018 at 3:19 AM, Hilbert Tu(杜睿哲_Pegatron) <
Hilbert_Tu at pegatroncorp.com> wrote:

> Hi Zoran,
>
> About this issue, I decide to follow David's suggestion to comment out the
> SMBus clock gating and then it can continue booting until load my U-Boot
> payload. But then it enters infinite reboot as previous attached log
> "smbus_init_fail_max_dump2.txt". I am not sure if is a side effect or
> just a new issue. Do you have any recommendation about the reboot? By the
> way, we have our own BDX-DE board, not Camelback CRB. But just use similar
> configuration. Thanks.
>
> -Hilbert
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