[coreboot] Asus AM1I-A

Elisenda Cuadros lists at e4L.es
Sun Feb 11 12:26:38 CET 2018


Hi Gergely,

Thank you for your config. Now I have coreboot + SeaBIOS perfectly working.

Console speed is now "normal" :-)

These are the changes between the two configs:

-------------

diff config_original.txt config_Gergely.txt
23c23
< # CONFIG_USE_BLOBS is not set
---
 > CONFIG_USE_BLOBS=y
101c101
< CONFIG_UART_FOR_CONSOLE=0
---
 > CONFIG_UART_FOR_CONSOLE=1
150c150
< CONFIG_POST_DEVICE=y
---
 > # CONFIG_POST_DEVICE is not set
210c210
< CONFIG_TTYS0_BASE=0x3f8
---
 > CONFIG_TTYS0_BASE=0x2f8
428,429d427
< # CONFIG_PCI_OPTION_ROM_RUN_REALMODE is not set
< # CONFIG_PCI_OPTION_ROM_RUN_YABEL is not set
431d428
< # CONFIG_VGA_TEXT_FRAMEBUFFER is not set
556c553
< # Serial port base address = 0x3f8
---
 > # Serial port base address = 0x2f8
581,583d577
< CONFIG_POST_DEVICE_NONE=y
< # CONFIG_POST_DEVICE_LPC is not set
< # CONFIG_POST_DEVICE_PCI_PCIE is not set

--------------

I made some tweaks to the configuration, added VGA output before 
payload, a nice bootsplash, etc..

Other considerations:

VGA Device PCI IDs are 1002,9830 (The default 1002,9836 does not get 
output).

Memory has to be located firstly on second slot (yellow DIMM_A2). If not 
you get AGESA_FATAL_ERROR. I only have one module.

Please, find attached a working config.txt and console.log. Coreboot 
revision is 4.7-294-g2db6fbc47b.

If you verify these changes are working for you is it possible to change 
the defaults in Kconfig?

Thank you very much.

Best regards,

-- Eli



On 11/02/18 00:07, Gergely Kiss wrote:
> Strange, the log you shared looked less verbose to me than expected 
> but seems like I was wrong. Anyway, you might find an example on a 
> full debug log here [1].
>
> I have a small build script I use to build coreboot for my board, 
> please find it attached.
>
> The version currently running on my box is 4.6-2554-ga1b4c94.
>
> [1] https://www.coreboot.org/Board:asus/am1i-a#Bootlog
>
> On 10 February 2018 at 23:18, Elisenda Cuadros <lists at e4l.es 
> <mailto:lists at e4l.es>> wrote:
>
>     Thank you for your kind reply Gergely.
>
>     I think the cable is not the problem, I have been using it for
>     years and it's intact.
>
>     I am using a usb dongle but not a cheap one. Tomorrow I will try
>     with another cable and a real COM port. Just to be 100% sure.
>
>     Console is fast at the very first time (just the "normal") but
>     after two seconds it becomes extremely slow.
>
>     Please, can you say me which is the git revision you are using?
>
>     The console log I attached is from a SPEW debug level, not
>     corresponding with the config.. I tried several configs today :-) .
>
>     Is it possible to share your config with me?
>
>     Best regards,
>
>     Eli
>
>
>     On 10/02/18 21:44, Gergely Kiss wrote:
>>     Hi Eli,
>>
>>     I've been using Coreboot on my board for several weeks, it is
>>     serving as an HTPC running 24/7 and it's working perfectly stable
>>     which suggests the firmware should be free of bugs. It is likely
>>     that you are facing some configuration or hardware issue here.
>>
>>     I didn't see any issues with the serial output while working with
>>     the board once the SuperIO chip started to work. Make sure the
>>     cable you use is intact and try to attach it to another machine.
>>     At the time I was working with my board, I used a Dell Port
>>     Replicator with a native COM port so I could use a standard
>>     null-modem cable and it was working flawlessly. In case you use a
>>     USB serial adapter, try replacing it or attach the serial cable
>>     directly to a COM port if you have one available.
>>
>>     Also, please enable debug_level=Spew as it seems the console log
>>     you attached comes from a less verbose setting and therefore it's
>>     not as useful as it should be.
>>
>>     Note that the VBIOS image is executed by SeaBIOS which means you
>>     won't see anything on your display until the payload is executed.
>>
>>     If all else fails, you can still attach a POST debug module to
>>     the LPC header of the board [1] which can help a lot to find out
>>     where the boot process hangs.
>>
>>     Feel free to contact me if you need some more help or
>>     information, I'm happy to assist!
>>
>>     Regards,
>>     Gergely
>>
>>     [1] https://www.youtube.com/watch?v=aGGqsWx3-1c
>>     <https://www.youtube.com/watch?v=aGGqsWx3-1c>
>>
>>     On 10 February 2018 at 18:17, Elisenda Cuadros <lists at e4l.es
>>     <mailto:lists at e4l.es>> wrote:
>>
>>         Hello,
>>
>>         I'm trying to use Coreboot in an Asus AM1I-A board recently
>>         ported by Gergely Kiss (thank you!).
>>
>>         I am using the default config settings and added vga rom
>>         extracted with UEFITool from the vendor bios.
>>
>>         After flashing and booting I get no output from vga.
>>
>>         Serial console is extremely slow too (30 minutes to write the
>>         log)
>>
>>         I attach the coreboot console log, config and cbfs.txt.
>>
>>         Any hints?
>>
>>         Thanks in advance.
>>
>>         Best regards,
>>
>>         -- Eli
>>
>>
>>
>
>
>
>

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