[coreboot] Intel soc ACPI generation using soc/intel/common/block/acpi

Julien Viard de Galbert jviarddegalbert at online.net
Thu Feb 8 16:20:55 CET 2018


Hello all,

First sorry for mailing direclty those of you who are on the coreboot mailing list.

I’m currently in the process of upstreaming the changes we have on denverton.
On the ACPI I see a lot in common with the code available in soc/intel/common/block/acpi.
However this depends on PMC which depends on GPIO. And the GPIO code
conflicts with the code already in denverton so I can’t enable it. (I’ve not checked
In details about the PMC code yet).

What would be the best way to port it ?

1. Stick with what is working, duplicate some code but don’t break other platforms.
2. Try to refactor the GPIO code and denverton code so they are compatible.

For point 2 the thing is that I can test for other platforms and it will really add more
work now. But if the longterm goal is to refactor all intel soc to mostly use common/block
then this might be worth it.

What are your recommendations?

Best Regards


--
Julien Viard de Galbert - jviarddegalbert at online.net
Online / Scaleway
Looking for an amazing job? Join us NOW ! https://careers.scaleway.com/




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