[coreboot] The problem of coreboot porting to fu540

[Jonathan Neuschäfer]

Hi,

On Mon, Dec 10, 2018 at 05:29:44PM +0800, 王翔 wrote:
> I use bbl as the coreboot's payload, bbl can start and running into the enter_supervisor_mode function, but can't continue. 
> 
> I added some code to print register state before mret and print memory on target address.
> I debugged it for a long time and didn't know where the problem was. hoping to get your help.
> 
> 
> Below is my output:
> 
> ```
> 
> mhartid  : 2
[...]
> mhartid  : 1
[...]
> mhartid  : 3
[...]
> mhartid  : 4
[...]


My first guess is that BBL is waiting for Hart 0, but I have not looked
at BBL's code to verify that this could be the case.


Jonathan
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