[coreboot] Re : Re: When does AMD release the fam15 spectre microcode updates?

echelon at free.fr echelon at free.fr
Wed Apr 25 18:42:50 CEST 2018

Hello Rudolf,
First thank your for finding these blobs and the hack to use them, and for testing and validating them.
But please could you tell us what was the setup for your tests :
 - what was your hardware : cpu + mobo (chipset)?
 - what was your linux kernel version?
Thank you beforehand.
Best regards,

----- Mail d'origine -----
De: Rudolf Marek <r.marek at assembler.cz>
À: coreboot at coreboot.org
Envoyé: Tue, 17 Apr 2018 09:30:57 +0200 (CEST)
Objet: Re: [coreboot] When does AMD release the fam15 spectre microcode updates?


I found new microcode here [1], I used cpu00610F01_ver0600111F_2018-03-05_AC55EB96.bin as a microcode for my Trinity family15h CPU.
I hacked together a new microcode header which contains the equivalence table etc to be able to load this microcode into the CPU from Linux.

dd if=/lib/firmware/amd-ucode/microcode_amd_fam15h.bin bs=1 count=84 of=header.bin
cat header.bin cpu00610F01_ver0600111F_2018-03-05_AC55EB96.bin > microcode_amd_fam15h.bin

copy the file to same location and trigger update:

echo 1 >  /sys/devices/system/cpu/microcode/reload

[ 6032.948243] microcode: CPU0: new patch_level=0x0600111f
[ 6032.964913] microcode: CPU2: new patch_level=0x0600111f

Please note that the header.bin does contain a size of the microcode blob, but it happens to be the same, so it works. Normally the container
may contain more microcode blobs. But in my case I use just "right" one for my CPU.

The new microcode seems to be adding the IBPB feature.


[1] https://github.com/platomav/CPUMicrocodes

coreboot mailing list: coreboot at coreboot.org

More information about the coreboot mailing list